The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Automatic white balance and color filter array interpolation are two important function of image signal processor for CMOS image sensor. This paper describes the designs and implementations of new automatic white balance method and color interpolation method on FPGA. This white balance method can effectively get the better of the defects of gray world and gray world-retinex methods by calculating...
The computational complexity and hardware design of block-matching criteria were discussed, and a novel MPDC algorithm and its VLSI structure for H.264 were presented, in which a QP adaptive MPDC threshold was derived from the basics of H.264 4??4 integer transform and 52-level scalar quantization and the calculation process was adjusted for hardware optimization. When QP is greater than 18, the proposed...
This paper proposes a low power convolver in channel estimation. It works in the time domain. Ram is used instead of register chains in typical architectures. The power is compared when using different depth of rams. The synthesis results show that the power of the ram based convolver of depth 64 can be reduced to only 57% of that of the register based convolver. And the area can be reduced to 67%.
A charge recycle technique is proposed in this paper to lower the dynamic power and to improve the performance of the Zipper domino circuits. Zipper domino circuits of different structures are designed utilizing this technique and simulated based on 65 nm, 45 nm and 32 nm BSIM4 SPICE models. The simulation results show that the power-delay product (PDP) is reduced by up to 42.37% as compared to standard...
In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal...
In this paper, we have proposed a new high precision ramp waveform generator for low cost ADC test. With proposed test method combined with histogram analysis, an ADC can be easily tested on general digital testers. In our approach, we combine a traditional ramp generator with proper gain of operational amplifier (OPA) for ADC test. This new ramp generator structure can reduce the effect of output...
In this paper, the novel mechanical switch device: suspended-gate FET is applied to FPGA development. This device offers almost an ideal subthreshold swing and a hysteretic resistance switching, opening opportunities for low-power applications. The proposed device can be used as the building block of programmable elements and memory of an FPGA. Based on this device, the proposed FPGA architecture,...
Experiments and theory have so far demonstrated that single molecules can form the core of a two-terminal device.Here this paper simulates the I-V characteristics of the benzene-molecular system on the basis of the tight-binding method.The results exhibit negative differential resistance and an on-off peak-to-valley ratio in excess of 1400:1 when the temperature is 100 k . And discusses the influence...
The material dependence of NBTI in SiON p-MOSFETs is studied using the UF-OTF IDLIN method. It is shown that the N density at the Si/SiON interface plays a very crucial role in determining the magnitude as well as the time, temperature and field dependence of NBTI. The relative contribution of interface trap generation and hole trapping to overall degradation is qualitatively discussed.
The total dose radiation effect (TDRE) has been regarded as one of the most harmful factors to degrade MOS devices. In this paper, a simple new method called avalanche injection of holes is introduced to simulate or displace the radiation experiments to determine the TDRE of MOS devices. Like TDRE, avalanche injection of holes can also provide sufficient holes to flow into the gate oxide layer where...
To date, electronics uses electron charge as a state variable which is often represented as voltage or current. In this representation of state variable in today??s electronics, carriers in electronics devices work independently even to a few and single electron cases. As the scaling continues to reduce the feature size, power dissipation and variability become two major challenges among others as...
We fabricated a carbon nanotube (CNT) via interconnect and evaluated its electrical properties. We found that the CNT via resistance was independent of temperatures, which suggests that the carrier transport is ballistic. From the via height dependence of the resistance, the electron mean free path was estimated to be about 80 nm, which is similar to the via height predicted for hp32-nm technology...
This article summarizes the history and progresses on our development of the Bipolar Field-Effect Transistor Theory (BiFET). The 2-Dimensional (2-D) rectangular geometry of the transistor (uniform in the width or Z-direction) is employed to decompose the 2-D equation into two 1-D equations which are parametrically coupled by the surface-electric-potential. This decomposition enables us to obtain the...
Precise two-dimensional current and capacitance modeling of short-channel, nanoscale multigate MOSFETs is presented. The model covers a wide range of operating regimes, geometries and material combinations. The modeling in the subthreshold regime is based on conformal mapping techniques. In moderate to strong inversion, we obtain self-consistent results based on the 2-D Poisson??s equation. The results...
We present a historic overview of the initial motivating ideas, original foundations, and subsequent development, of integration-based methods which are currently used to extract semiconductor device model parameters, as well as to assess devices?? and circuits?? non- linearity. To illustrate these methods?? capabilities, in this paper we review sample applications specifically focusing on two-terminal...
The paper presents a comprehensive study of Spice modeling for some key physical effects observed in a 65 nm CMOS process. STI-induced stress effect, well proximity effect, as well as HCI and NBTI reliability effects, which can not be neglected for technologies beyond 90 nm and must be properly modeled for accurate circuit simulations, are discussed in this study.
An improvement on the parameter extraction technique for compact device models based on Genetic algorithms is presented. The use of fuzzy logic based rules to direct the evolution of the genetic algorithm enhances the convergence and the physical meaning of the parameters is preserved. Another advantage of this method is that the fuzzy rules can be applied just to a reduced set of model parameters...
Accurate prediction of circuit aging and its variability is essential to reliable design and analysis. Such a capability further helps reduce the load in statistical reliability test. Based on the physical understanding of circuit aging effects, we develop a predictive short term and long term model to characterize NBTI-induced threshold voltage degradation (??Vth) at transistor level. Due to process...
This article reviews integration-based model-parameter extraction methods for MOSFETs. It comprises three different methods that use the transfer characteristics measured under linear regime operation conditions. Additionally two other methods are included for extraction under saturation conditions. An integration-based method to evaluate the location of a maximum value of a given function is also...
The negative bias temperature instability (NBTI) of p-MOSFET has the greatest impact on the long term reliability of nano-scale devices and circuits. For several decades, NBTI research has been focused at the device physics level or on the characterization methodology, with little attention paid to the impact of NBTI on the performance of basic digital circuits. This paper discusses the effects of...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.