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We fabricated a carbon nanotube (CNT) via interconnect and evaluated its electrical properties. We found that the CNT via resistance was independent of temperatures, which suggests that the carrier transport is ballistic. From the via height dependence of the resistance, the electron mean free path was estimated to be about 80 nm, which is similar to the via height predicted for hp32-nm technology...
65 nm BEOL trench etch is apt to suffer the marginal PR issue. It is a big challenge for trench etch process to simultaneously satisfy the requirements for both metal resistance (Rs) and breakdown Voltage (VBD). The copper surface condition of via bottom is a big concern of trench etch process as well. In this paper, we present several electrical parameter issues that occurred at 65 nm trench etch...
Nanosized zeolites as a novel absorbent were investigated targeting for the nerve agent sarin stimulant gas DMMP. Quartz crystal microbalance (QCM) gas sensors modified with Silicalite-1 or Cu-ZSM-5 zeolites synthesized as micro-porous absorbents were fabricated and their gas response characteristics were examined to study the absorption capability of zeolites. The results indicated that Cu-ZSM-5...
With the complementary metal-oxide-semiconductor (CMOS) technology approaching its scaling limit, many novel devices and material are being considered to enable further scaling of CMOS. Carbon nanotubes show unique properties and are currently considered as a potential alternative material for nano-CMOS building blocks. Performance of carbon nanotube field effect transistors (CNFET) can be competitive...
A high-performance three-dimensional (3-D) microinductor was fabricated by using MEMS technology. This inductor has an air core and copper coils. The measurement results show that this inductor has high quality (Q) factor over wide range of operating frequency and high fres (self-resonant frequency). The maximum Q-factor of this inductor is 38 (@6 GHz) and the inductance is 1.81 nH at peak-Q frequency.
The resistance switching characteristics of several metal oxides has been reported recently for nonvolatile memory applications (NVM). However, various issues such as the switching mechanisms, switching uniformity, scalability and reproducibility have not yet been solved. In this paper, we discuss the recent progress of switching mechanisms and switching behaviors of various materials.
Excellent nonpolar resistive switching behavior is reported in the Cu doped ZrO2 memory devices with the sandwiched structure of Cu/ZrO2:Cu/Pt. The ratio between the high and low resistance is in the order of 106. Set and Reset operation in voltage pulse mode can be as fast as 50 ns and 100 ns, respectively. Multilevel storage is considered feasible due to the dependence of ON-state resistance on...
Metal ions embedded in dielectric films may play an important role in the reliability of advanced interconnect systems. In this talk, we will discuss the generation and drift of different metal ions such as Cu, Ta, and Ti into the dielectric materials from gate electrodes under an external electric field at elevated temperatures. Some strategies to eliminate the generation of metal ions will also...
For the first time, we report that the copper oxide (CuxO) based resistive random access memory (RRAM) cell can achieve 104 cycles (i.e. ~10x better) as a new record as well as elimination of the initial ??forming?? than reported in literature. The copper oxide is integrated in MIM (metal-insulator-metal) structure and is grown by plasma oxidation of Cu substrate, with CuO near upper surface and graded...
This paper has reported a programmable switch composed of copper-doped-SiO2 sandwiched between Cu top electrode and inert W bottom electrode. Reproducible rectifying-like I-V performance was found in the device with top electrode (TE), while with regard to the cell without TE, no rectifying-like I-V characterization was observed. This rectifying-like I-V curve is properly caused by electrode contact...
Metal MEMS structures can be formed by metal electroplating with the aid of thick-photoresist molds. The microfabrication features low-temperature process that is post-CMOS compatible and can be used for on-chip integration of high-performance RF parrives for RFICs. On the other hand, The plating process can be combined with silicon micromachining techniques to build operation tools, like probe-cards,...
At the process development stage, the non-uniformity of the BEOL dielectric breakdown voltage (Vbd) in a wafer mapping is always observed. Such non-uniformity may be induced either by ??interface-mode?? or by ??CD-mode??. This paper provides a fast method to identify the root cause for ILD Vbd fail through analyzing the current-voltage (I-V) curves from the V-ramp test.
Clustered superscalar is an attractive alternative to large monolithic superscalar, and point-to-point (p-to-p) network is often used as inter-cluster communication networks (ICCN) to transfer dependent values between clusters. This new class of networks has demands and characteristics different from traditional networks. In order to pursue high performance, it should be highly coupled with the microarchitecture...
The copper interconnect comes into nanometers with the scaling down of device dimension. At the same time, the resistivity is increasing and the characteristic gets worse. In our paper, an optimal aspect ratio (AR) for Cu-line is found by Monte-Carlo (MC) method so that we can get the optimized electric conductivity and improve the performance of interconnection.
Leakage and breakdown characteristics of low-k dielectrics are becoming increasingly important reliability issues for Cu interconnects as device dimensions are scaled. Especially, in 65 nm dual-damascene Cu process, low-k dielectric has difficulty in meeting a breakdown spec of 50 V on cumulative curve at 0.1% intersection. Both dual-damascene metal dimension process uniformity control and interface...
The chip package interaction (CPI) induced by the mismatch in coefficient of thermal expansion (CTE) between chip and package in a flip chip ball grid array (FCBGA) and its impacts on the mechanical reliability of Cu/ultra low-k interconnect were investigated using finite element analysis (FEA). 3D and 2D multi-level sub-modeling technique was used to link the deformation from the package level to...
Copper void density post copper CMP and defect reduction methods were investigated on 300 mm wafers of 65 nm node in this work. Effects of copper seed thickness, post-plating anneal temperature, FAB ambient and FOUP cleanliness on metal voids were examined. It was found that thinner seed thickness, lower anneal temperature with longer time post plating, high temperature de-gas or water rinse before...
We present the optimal planar microcoils with inner radius in several hundreds of microns. The microcoils are used in the RF transceiver probe in NMR experiment. At a certain condition of experiment the geometry of microcoil is optimized by analytic simulation about the signal-to-noise ratio while varying the number of turns. The fabrication of microcoils has been finished by photolithography technique...
The mechanism of two kinds of via etch striation (type I and type II) has been investigated to improve contact resistance (Rc) uniformity and solve breakdown voltage (VBD) issue in 65 nm Cu low-k interconnects. Heavy etching polymer deposition on the sidewall of capping layer and rapid photo-resist (PR) consumption on PR shoulder are two main resources to result in via etch striation. The effects...
The thermal and electrical stabilities of Cu contact on NiSi substrate with and without a Ru/TaN barrier stack were investigated. Four point probe (FPP), X-ray diffraction (XRD), scanning electron microscopy (SEM), and Schottky barrier height (SBH) measurement were carried out to characterize the diffusion barrier properties. The results show that the Ru(14 nm)/TaN(15 nm) stack can be both thermally...
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