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This paper proposes an approach to realize a leapfrog filter with transmission zeros by using OTA-C integrators and resistor-based addition circuit instead of OTAs. This method has advantages of reduced number of active elements and spread of element values. A tenth-order bandpass filter is presented as a design example.
In this paper, the use of the SB-ZePoC Coding-Scheme for a high precision AC Power-Standard (TET-Watt) is proposed. The use of SB-ZePoC allows a novel approach to binary switched precision-sources, as the switching-rate is low compared to sigma-delta modulation. The structure of the system allows to reference the output amplitude directly to a DC-voltage-reference or switching a binary source directly...
Recently complex systems are explored intensively and introduced to a large extent in different applications. In this paper we try to use complex systems to generate codebooks for vector quantization in the image coding field. A progressive optimization method for codebook generation using complex systems will be discussed.
AM-PM distortion causes spectral regrowth in RF transmitters with modulated signals. One reason for AM-PM is the fact that signal-dependent transistor input capacitance pulls the frequency response of the input matching network and causes phase shift already at the input of the transistor. This paper studies the Miller capacitance effect in most common fixed-supply and supply modulated power amplifier...
In this paper we present a differential stage suitable to be used as the input stage of rail-to-rail very low-voltage opamps. The topology exploits an input level-shifter to keep the common-mode input voltage of a pseudo-differential pair constant, thus providing a constant gain over the whole input common-mode range. The main drawback of the proposed solution is the need of a switched-capacitor level-shifter,...
This paper proposes a new Built-In Self Test architecture to detect time interval errors (TIE) of Phase-Locked Loops. A transient current sensor utilizing Flipped Voltage Follower (FVF) is used with a comparison block in the proposed topology. It is designed and verified for IBM 65nm technology using 1 V supply voltage and capable of detecting both steady-state and transient currents up to 150 µA...
In this paper, a low complexity algorithm for the design of a time-varying correction filter of finite impulse response (FIR) type is presented. Using the obtained filter design to correct a preceding time-varying system, a correction performance in the least-squares sense can be ensured. The adaptation of the filter design requires a moderate computational complexity and is suitable for real-time...
In this paper, the impact of the NMOS/PMOS imbalance on Ultra-Low Voltage (ULV) circuits and their design is discussed within a unitary framework for the first time. Variations are shown to dramatically affect imbalance due to the long-tailed probability density and high variability. The impact of the imbalance on the minimum supply voltage VDD,min ensuring correct gate switching is studied analytically...
We propose a forced chaos generator with a CMOS variable active inductor circuit. Two values of the equivalent inductance of the active inductor in the proposed circuit are switched by an external periodic square-wave voltage, so that a stretching-and-folding mechanism of chaotic motion is realized. The chaotic dynamics are confirmed through SPICE simulations with TSMC 0.35 µm CMOS semiconductor process...
Discretization effects of second order terminal sliding mode control systems are studied. The existence of periodic solutions is investigated. Complete classification of period-2 orbits is given. The influence of system's parameters on the size of the steady state solution is studied. Theoretical results are illustrated with simulation examples.
This paper shows a novel methodology to reduce the power consumption and complexity in unrolled CORDIC architectures. It is a methodology based on removing adder and subtractor stages starting from the first stage. The stages are replaced with a number of MUXes. Three to four stages can be removed with substantial reduction in complexity and power consumption. The methodology is applicable on CORDICs...
This paper reports a new measurement based approach that can be used to determine the functional dependence of a D.C. circuit variable of interest on a small set of design variables. The approach makes use of a small number of measurements and generalizes the well known Thévenin's Theorem of circuit theory.
In this study, we propose Partitioned Hopfield Neural Network (PHNN) to realize the memory mechanism of the human brain. The PHNN is realized by arranging cell which has a small HNN in the whole image regularly without overlap. By computer simulations, we confirm that the PHNN recalls the whole image from the partial characteristic of the stored images.
In this paper we present a complete study on the balance between high performance image processing and low power consumption without using expensive components. Our proposal consists in implementing a Discrete Time Cellular Neural Network (DT-CNN) on a low power Actel IGLOO nano Field Programmable Gate Array (FPGA). This is a definitive step further from previous work to obtain an intelligent camera...
In this paper, a novel lossless image coding scheme using the cellular neural network (CNN) is proposed. From the viewpoint of the optimal lossless coding, our method is optimized for not only mean squared error (MSE) but also a coding rate. The key idea of this work is that the local structure of an image is modeled by six types of CNN templates in order to achieve high prediction performance, and...
This paper presents how the optimization of continuous-time (CT) ΣΔ modulators by scaling the loop filter coefficients affects the signal transfer function (STF) and in which way the method can be used to reduce peaking in the STF. It is shown that, depending on the initial design, it is possible to define optimized parameter sets with increased performance and remaining flat STF or sets with constant...
This paper derives ƒs/2 modulation from signal and system theory of complex signals. It is presented, how the In phase and the Quadrature phase are reduced to a single phase, while all properties of complex signaling are maintained. Further, it is derived, that the remaining phase is predestinated for ΣΔ modulation. Finally, simulation results prove the theoretically derived offset-elimination property.
In this paper, modified, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and power consumption. Two different architectures are investigated, both have variable configurations of the input and output word-length (i.e., the physical resolution of the DAC). A modified architecture, termed in this work...
An analog cochlear implant topology realized by utilizing the concept of Sinh-Domain filtering is presented in this work. Owing to the inherent class-AB operation of Sinh-Domain filters, the proposed topology has the capability for handling currents larger than the corresponding dc bias currents, and avoiding the employment of two identical signal paths constructed from class-A configurations, as...
In this work an analytical design method for two types of 2D recursive filters is proposed. The design starts from a given analog prototype filter with specified parameters and a transfer function which is factorized into elementary (biquad) functions. Applying adequate frequency transformations to these functions, the desired 2D filters are directly obtained in a factorized form, preserving the selectivity...
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