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A digital wave filter operating on bandpass sigma-delta (SD) modulated signals is presented in this paper. The filter is obtained by a z-domain transformation of a baseband SD domain filter which is a binary-quantized discrete model of an analog distributed parameter filter (ADPF). Thus, the design properties of various ADPFs can be utilized for constructing the presented type of digital filters....
In low-rate UWB impulse radio the carrier pulses have very short duration that limits the energy per bit in an extremely low value. The low bit energy results in an unacceptable short radio coverage. In the paper new UWB carrier pulse generation techniques are proposed to increase the pulse duration considerably. In order to get an ultra wideband carrier a spectrum widening signal is used. Using this...
The energy transmitted per bit limits the radio coverage. In impulse radio the UWB pulses used carry a very little energy since they are extremely short. As a consequence the radio coverage is unacceptable short. A solution to increase the energy per bit is the enlargement of the duration of UWB carrier pulse, however, this solution cannot be used because the correlation of received pulse envelope...
This paper derives ƒs/2 modulation from signal and system theory of complex signals. It is presented, how the In phase and the Quadrature phase are reduced to a single phase, while all properties of complex signaling are maintained. Further, it is derived, that the remaining phase is predestinated for ΣΔ modulation. Finally, simulation results prove the theoretically derived offset-elimination property.
This paper presents a pulse-width and position modulator (PWPM) topology suitable for digital centric polar transmitter frontends suitable for software defined radios. PWPM enables the usage of highly efficient switching-mode power amplifiers (SMPA) and direct control of the output power. The presented first implementation of the modulator targets 3GPP and Long Term Evolution (LTE) base-stations and...
This paper proposes a compact mathematical model for predicting and analyzing Delta-Sigma modulator's spurious tones. The model is based on frequency modulation and it outputs an accurate quantization noise estimate array for an arbitrary modulator stimulus: dc, ramp, sinusoid, two-tone, etc. For predicting the pattern noise or limit cycles, the proposed estimation model was found very precise. The...
In this paper a phase compensation technique for the digital up conversion of a quadrature signal for amplification with switch mode power amplifiers is proposed. When a digital signal generator is used to generate the complex envelope signal care must be taken to compensate for the phase skew between the two paths. If phase compensation is not implemented an image caused by up converting the complex...
A Continuous-Time Sigma-Delta (ΣΔ) Modulator for Bluetooth with 52MHz sampling frequency in a 1.2V 65nm CMOS process is presented. The modulator has a proposed single-stage 3rd-order 4-bit architecture, which employs a dual-loop feedback method to compensate the loop delay up to one clock period. A 4-bit flash ADC and a 4-bit current-steering DAC are used to improve the resolution and stability. Non-Return-Zero...
This paper reports on a Field Programmable Gate Array (FPGA) implementation as well as prototyping for real-time testing of a low complexity high efficiency decimation filter processor which is deployed in conjunction with a custom built low-power jitter insensitive Continuous Time (CT) Sigma-Delta (Σ−Δ) Modulator to measure and assess its performance. The CT Σ−Δ modulator/decimation filter cascade...
Application of the ΣΔ modulation technique to the on-chip spectral test for high-speed A/D converters is presented. The harmonic HD2/HD3 and intermodulation IM2/IM3 test is obtained with one-bit ΣΔ sequence stored in a cyclic memory or generated on line, and applied to an ADC under test through a driving buffer and a simple reconstruction filter. To achieve a dynamic range (DR) suitable for high-performance...
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