The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Matrix inversion is sensitive towards the number representation used. In this paper simulations of matrix inversion with numbers represented in the fixed-point and logarithmic number systems (LNS) are presented. A software framework has been implemented to allow extensive simulation of finite wordlength matrix inversion. Six different algorithms have been used and results on matrix condition number,...
The paper presents the direct application of the signal flow graphs (SFG) in calculation of higher order derivatives (sensitivities) of the linear network functions. It is based on the adjoint networks, represented by SFG. Thanks to the application of SFG we can calculate the exact value of any order derivative of the output variables without knowing their solutions in explicit form. Moreover the...
The Discrete wavelet transform (DWT) has been used in a wide range of real-time application. Algebraic integer quantization (AIQ) encoding has been proposed to represent the irrational transform basis of the wavelet transform as polynomials with integer coefficients. In this paper, we suggest to restate these polynomials to obtain simpler coefficients for both the integer coefficients and the polynomial...
This paper proposes a method to design low-delay fractional delay (FD) filters, using the Farrow structure. The proposed method employs both linear-phase and nonlinear-phase finite-length impulse response (FIR) subfilters. This is in contrast to conventional methods that utilize only nonlinear-phase FIR subfilters. Two design cases are considered. The first case uses nonlinear-phase FIR filters in...
FFT-IFFT configuration, or more generally a forward-inverse orthogonal transform pair, offers a way to implement a digital filter whose frequency-domain characteristics can be straightforwardly tuned by adjusting the complex gains of the frequency bins. Using filter banks (FBs) for the transform pair, sharp transition bands can be obtained for low-pass/bandpass/highpass type filter designs. However,...
Computing Euclidean Distances is a very important operation in digital communication, especially in the case of trellis coded modulation, where it is used numerously. This paper shows that a substantial reduction in complexity can be achieved in hardware processing elements for computing Euclidean Distances. A reduction in complexity down to 39% is shown compared to traditional designs. The paper...
In this paper, a low complexity algorithm for the design of a time-varying correction filter of finite impulse response (FIR) type is presented. Using the obtained filter design to correct a preceding time-varying system, a correction performance in the least-squares sense can be ensured. The adaptation of the filter design requires a moderate computational complexity and is suitable for real-time...
This paper shows a novel methodology to reduce the power consumption and complexity in unrolled CORDIC architectures. It is a methodology based on removing adder and subtractor stages starting from the first stage. The stages are replaced with a number of MUXes. Three to four stages can be removed with substantial reduction in complexity and power consumption. The methodology is applicable on CORDICs...
In this paper, modified, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and power consumption. Two different architectures are investigated, both have variable configurations of the input and output word-length (i.e., the physical resolution of the DAC). A modified architecture, termed in this work...
In this paper, symbolic matrices and a simple algebraic method to list spanning trees and find Hamiltonian circuits in a simple un-oriented graph are used. A concrete, fully-parallel algorithm that achieves both goals, with examples is shown. A necessary and sufficient condition for Hamiltonicity is presented, too.
Current methods used to design multiplierless digital filter have demonstrated their potential to construct low complexity circuits from multiplier blocks with few adders in order to replace the multipliers of standard Finite Impulse Response structures. However, the traditional approach only provides a local optimization as it need to rely to defined circuit architectures, such as the direct form...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.