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The design, fabrication and testing of a novel resonant accelerometer integrated with a temperature sensor is presented in this paper. The accelerometer consists of double quartz resonators and a silicon substrate. A novel diamond like carbon (DLC) film with special electrical property, excellent mechanical property and chemical stability, which has negative temperature coefficient of resistance (TCR),...
Surface photovoltage (SPV) method was used to evaluate the silicon-sapphire interface potential barrier of silicon on sapphire (SOS) wafers obtained by CVD technique. The method provides monitoring of silicon-sapphire interface quality. Fabrication process parameters which influence on SPV signal were found. Silicon deposition temperature has a great importance on SPV signal. It was found that SPV...
Thin (300 and 600 nm) epitaxial silicon layers were deposited on R-plane sapphire wafers by CVD technique using SiH4 and SiCl4 mixture gas diluted by hydrogen. Quality parameters of epitaxial silicon on sapphire (SOS) wafers were studied by means of XRD, AFM, UV scattering and surface PV methods. Resistivity profiles of layers were measured. Quality of SOS in dependence on initial growth (up to 80–100...
CMOS-compatibly fabricated silicon athermal MZI is trimmed in wavelength by the amount from −0.15 to −5.15 nm using thermal annealing process over 400 °C. Temperature-dependence less than 2 pm/°C is maintained after the annealing.
As microelectronic industry moves toward stacking of dies to achieve greater performance in smaller footprint, there are several reliability concerns when assembling the stacked dies on current organic substrates. These concerns include excessive warpage, interconnect cracking, die cracking, and others. Silicon interposers are being developed to assemble the stacked dies, and then to assemble the...
The General Antiparticle Spectrometer (GAPS) experiment is an indirect dark matter search that aims to detect low-energy antideuterons resulting from dark matter annihilations and decays in the Galactic halo. Layers of semiconducting lithium-drifted silicon (Si(Li)) tracking detectors are essential to the success of the GAPS detection and background rejection scheme, requiring ∼22.5 square meters...
A fabrication process for a thermo-diode microbolometer array is presented. The process is based on a sintered porous silicon (sPS) technique adopted from Chipfilm™ technology to enable vertical thermal insulation of the pixels. In addition, the process offers the possibility to have more than one diode per pixel connected in series. It is demonstrated that this boosts the temperature sensitivity...
A combined fabrication process using polymer and silicon planar microtechnologies is presented here and used for the fabrication of a fully-integrated three-axis thermal accelerometer. The use of polymers (polystyrene and polyimide) with low thermal conductivities improves the overall power consumption of the thermal accelerometer and enables a simple and low-cost fabrication process. The accelerometer...
We demonstrate the design and fabrication of a novel micromachined Thermoelectric Nanowire Characterization Platform (TNCP) which is utilized to characterize the thermoelectric properties of various nanowires. Single nanowire is assembled onto the pre-fabricated TNCP by means of dielectrophoresis (DEP) in combination with a water droplet evaporation scheme. After assembly, a reliable ohmic contact...
A novel method to fabricate an atomic force microscope (AFM) probe with CuO nanowire was proposed using a stress-induced method which can form nanowire easily. By heating a commercial AFM probe which is eliminated its tip and is coated with Ta and Cu films, Cu hillock and CuO nanowires on the hillock can be formed at the probe end. To obtain the CuO nanowire of high aspect ratio that can use as an...
We show that the properties of silicon can be changed profoundly when nanofabricated to below 5nm, resulting in larger bandgap emission and more efficient light generation. Moreover, three-dimensional nanostructures can be fabricated at these nanoscale dimensions by dynamic control over the dry etching process.
We designed and experimentally demonstrated two new types of self-imaging MMIs. One worked as a WDM device and the other worked as a wavelength filter.
In this paper we report on a newly developed nanowire based field-effect device-architecture (NWFET) that can be used in high temperature environments. Our devices posess both high temperature stability and low OFF-state current. By changes in source/drain bias-polarity the electrical properties of the NW-devices can be tuned, whether the lowest possible leakage current, or maximum output current...
This paper reports a simple method to create silicon nano tips in post self-assembled monolayer (SAM)-based anisotropic wet etching. To demonstrate the fabrication feasibility, different local etch rates at stressed surfaces at hemispherical silicon specimens in surfactant-added etchants compared to those on flat silicon surfaces have been measured, which are explained as the enhanced adsorption of...
This paper demonstrates silicon APD with low dark current for Positron emission tomography (PET) application. The origin of dark current has been studied by measuring dark current at different temperature and different bias. It is shown that dark current of the silicon APD originates from the field assisted band-trap-band tunneling.
In this report, we describe the fabrication and experimental demonstration of Si single-electron transistor. The CMOS compatible process flow uses lithography, dry etching and chemical mechanical polishing. The fabricated device showed Coulomb blockade oscillations well above 150 K.
The fabrication of very large photovoltaic thin film modules based on hydrogenated amorphous silicon (a-Si: H) technology on float glass is presented. The different production steps are explained. These are plasma enhanced chemical vapor deposition of a-Si: H films in a 2.6 m x 2.2 m capacitive plasma reactor, transparent conductive oxide (TCO) and metal deposition in an 2.6 m wide in-line sputter...
We present an advantageous fabrication technology for the integration of pressure sensor into the multi-sensor for micro weather station. Differing from traditional silicon piezoresistive or capacitive pressure sensor, we use platinum piezoresistive pressure sensor in the integration, which can greatly simplify the whole process and also has an excellent performance. We also use adhesive bonding with...
In this work, we have successfully demonstrated SONOS memories with embedded Si-NCs in silicon nitride by in-situ deposition method. The self-assembly silicon nanocrystals were in-situ deposited within the Si3N4 storage layer by dissociation of dichlorosilane (SiH2Cl2) gas to a high density of 9 times 1011 cm-2. This new structure exhibits larger memory windows for up to 6 V, better program/erase...
Ultra Thin Body Si-On-ONO (UTB SOONO) transistors with ultra thin spacer are successfully demonstrated and evaluated. They have shown increased driving current more than 30% compared with conventional UTB SOONO transistors with thick spacer due to reduced source/drain resistance without short channel effect degradation by using thin spacer. In this paper, it is shown that thin spacer technology is...
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