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This paper presents an open loop readout circuit technique for capacitive inertial sensors using a charge balanced and ratiometric approach. The charge balance is achieved through a delta-sigma loop allowing for direct analog-to-digital conversion at comparatively lower power. Techniques for achieving differential implementation, noise and offset cancellation are also discussed in lieu of the limitations...
This work presents a new method for kTC noise calculation in periodic switched capacitor circuits. Two basic applications are overviewed. Namely the switched capacitor low-pass filter and the N-path band-pass filter. Analytical noise calculation using the new method is performed for both examples. The obtained analytical results are confirmed with SpectreRF Pnoise analysis and ELDO transient noise...
A novel sequential inter-stage correlated double sampling technique has been proposed. This technique provides considerable enhancement in the effective accuracy of a switched-capacitor architecture. Superior accuracy and thermal noise performance is achieved compared to the conventional correlated double sampling technique. The proposed approach provides higher input signal bandwidth by reducing...
A modified low-power switched-capacitor integrator is proposed. It reduces power dissipation without increasing the thermal noise. The proposed integrator is parasitic-insensitive and allows a high linearity. A modified low-distortion self-coupled Delta-Sigma (Δ£) Analog-to-Digital Converter (ADC) is proposed to incorporate this new integrator. Analysis and simulations show that the high linearity...
Several circuit-level techniques are described which are used to reduce thermal noise and break the so-called kT/C limit. kT/C noise describes the total thermal noise power added to a signal when a sample is taken on a capacitor. In the first proposed technique, the sampled thermal noise is reduced by altering the relationship between the sampling bandwidth and the dominant noise source, providing...
This paper introduces a low-noise, low-power amplifier for high-impedance sensors. An innovative circuit using an auto-zeroed architecture combined with frequency modulation to reject offset and low-frequency noise is proposed and analysed. Special care was given to avoid broadband noise aliasing and chopping in the signal path, and to minimize both the resulting equivalent input offset voltage and...
A low-power switched-capacitor (SC) gain stage based on a capacitive charge-pump (CP) is proposed. It is shown that the CP gain stage achieves the same input-referred thermal noise as a conventional SC gain circuit, while consuming significantly lower power. The effect of parasitic capacitances on the CP gain circuit is discussed. Simulation results confirming the improved power/performance trade-off...
We analyze in-band thermal noise in continuous-time delta sigma modulators (CTDSMs) with Switched-Capacitor feedback DACs. We show that in such modulators, noise from around multiples of the sampling frequency aliases to in-band frequencies. We give an intuitive understanding of this phenomenon and describe a model that can be used to analyze noise in such modulators. We present the results obtained...
A low power 10 bit, 40 MS/s pipeline analog to digital converter is presented. A number of low-power techniques are proposed in various levels of abstraction. In circuit level, a low power class A/AB opamp with direct common-mode-feedback circuit (CMFB) is proposed which significantly reduces power in the opamps. In backend design, optimal series capacitors are layed out to break the deadlock between...
Power consumption is an important limitation to analog-to-digital converters. The objective of this paper is to estimate a lower bound to the power consumption of successive approximation analog-to-digital converters. This is an extension of our previous work which was limited to pipelined and flash architectures. We find that the power consumption in our case is bounded by capacitor mismatch or thermal...
Very low frequency Gm-C filters are critical cells that should be carefully designed in order to avoid an excessive occupation of silicon area, especially when a high dynamic range is required. In this work we propose a routine, which exploits the MATLAB Optimization Toolbox in order to perform an optimum sizing of low frequency Gm-C integrators. The target is minimizing the integrator area, while...
Purely electrical heat engines driven by the thermal noise voltage of resistors are introduced. In these engines, there is no steam, gas or combustion and the only mechanically moving elements are the piston and resonator (flywheel). Resistors, capacitors and electronically controlled switches are the other building elements. For the best performance, a large number of parallel engines must be integrated...
This paper presents a novel ΔΣ circuit based on the implementation of discrete time filters using very incomplete settling. This approach allows building a ΔΣM with mostly dynamic elements thus reducing the power dissipation. A 2nd order ΔΣM architecture, using this technique, is presented and analyzed. High-level and transient noise electrical simulations prove the validity of the concept. Electrical...
This paper presents a behavioral model of the direct sampling mixer (DSM) using MATLAB SIMULINK environment. The proposed model is integrated into a SIMULINK block with tunable parameters, which allows fast and convenient time domain simulations. Nonidealities, including transconductance nonlinearity, jitter effects and on-resistance thermal noise were addressed. Among these nonidealities, jitter...
In this paper a low noise CMOS interface circuit has been designed for capacitive liquid crystal (LC) chemical and biological sensors. The interface circuit consists of a low noise differential folded cascode amplifier that has been optimized for noise and performance requirements of the LC sensors. Two on chip interdigitated capacitors with LC on top, provide differential measurement of the sensor...
The multiplying D/A converter stage with time-shifted correlated double sampling technique is analyzed. Comprehensive models for the residual error due to finite amplifier gain and the thermal noise power are derived; the settling behavior of such stages is presented. It is shown that the selection of the error storage/hold capacitance introduces tradeoffs with respect to noise, accuracy, and power...
A design of low-noise charge sensitive amplifier (CSA) for measurement of optical response of photo-detector registering light produced by semiconductor scintillator is presented. Detailed analysis of the CSA suitable for large parasitic detector capacitance is provided, regarding noise, power and stability. Two scenarios where input transistor is biased in strong inversion and weak inversion are...
Time interleaved sigma-delta converter is a potential candidate for multi-mode wideband analog to digital (A/D) converters dedicated for multistandard receivers. However, the interpolation by zeros recquired to compress the useful signal bandwidth at the input of the sigma-delta modulator imposes constraints on the implementation of the analog part leading to a very large die area due to the high...
The concept of using capacitive charge-pumps to reduce the power consumption in switched-capacitor (SC) integrators is further extended. It is shown that the charge-pump (CP) integrator can be implemented using both opamp-based and comparator-based SC circuits and achieve significant power savings. When the input sampling capacitor is split into two capacitors, the opamp-based CP integrator ideally...
This paper describes the design of an 8-bit fully differential pipelined analog-to-digital converter (ADC). The design methodology employed in this work follows a technique of allocating appropriate error budgets to the various ADC errors such that the maximum differential nonlinearity (DNL) error is less than 0.5 least significant bits (LSB). Simulation results show that the ADC maximum DNL errors...
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