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Detection of water and ice over road and runway surfaces is an important issue in improving traffic safety and reducing costs for the maintenance, especially during winter. A low cost capacitive sensor for the estimation of road and runway conditions is studied. An algorithm for the estimation of the state of road and runway surfaces (dry, wet, or icy) was developed based on experimental results,...
This paper describes the design and development of a cellular near-field power harvesting circuit. Its potential to independently power sensor systems without batteries is demonstrated and discussed. As universal criteria to decide which batteries in sensor systems can be directly replaced by the proposed power harvesting circuit, discharge characteristics of Lithium and Alkaline batteries were investigated...
Subthreshold source-coupled logic (STSCL) has been recently shown to be an advantageous logic style for ultra-low power applications. In the subthreshold region, STSCL provides improved power-delay performance and increased robustness over static CMOS logic. In this paper, we present a new timing error detection (TED) latch, or (TEDsc), which uses STSCL for detecting timing errors while using static...
This paper presents a receiver structure for supporting ultra-wide-band (UWB) and wireless local area network (WLAN) standards using integrated transmission-line sigma delta modulators (ITLSDMs) as the baseband (BB) block. The operational transconductance amplifiers (OTAs) and the integrated transmission lines (ITLs) of the ITLSDM act as the variable gain amplifiers (VGAs) for the on-off keying (OOK)...
The introduction of new modulations on the global navigation satellite systems brings potential improvements for ground positioning. Clever receiver designs taking advantage of the characteristics of the new signals will be able to achieve better accuracy, higher sensitivity, improved multipath mitigation and tracking robustness. In this context, this paper focuses on the Galileo E5a signal and study...
This paper presents the capacitance effect on the output characteristics of solar cells (SCs). For this purpose, a current sweep circuit was built to bias the SC. We show that the output characteristics begin to split due to charge or discharge of the internal capacitance. Experimental results are analytically discussed and compared with simulation, employing a dynamic model of the SC implemented...
This paper describes a continuous technique to control and calibrate the digitally controlled oscillator (DCO) frequency slope gain of an all-digital phase-locked loop (ADPLL) based frequency modulation (FM) radio transmitter. The transmitter uses the FM baseband data during transmission and evaluates the resolving phase error to compensate voltage and temperature variations. The technique provides...
A prototype of a high-density multielectrode array for in vitro recording of electrogenic cell networks has been developed. On a surface of 1.92×1.92mm2, it includes 32×32 pixels with a dimension of 60×60μm2. For local amplification of the sensed extracellular signals, two fully differential low-noise amplifiers with offset reduction circuit have been designed. According to simulations, they feature...
An electronic interface for neural recording, Peripheral Neural System (PNS) stimulation and electrode impedance measurement is presented. The device can be connected to the computer by an USB link and is controlled by a Graphical User Interface (GUI). The system is composed by an analog unit and by a digital module for data acquisition and system configuration. Two microcontrollers allow to configure...
This paper presents the implementation of the automatic impedance matching in RF/Microwave power harvesters. The necessity of tuning the matching network for different working conditions is reviewed. Different methodologies to realize tuneable matching network are analyzed and compared. Tradeoff between tuneablity and self power consumption of the parasitics in the matching network is analyzed. A...
This paper presents an accelerometer interface circuit using a vacuum packaged MEMS sensor element. In order to damp the sensor element, increase the linearity and improve the input range of the sensor, a closed-loop analog SC interface with a PD-controller is used. The theoretical input range of sensor is ±1.4 g while measured range of the sensor is from -0.7 g to +1.4 g. The interface achieves maximum...
This paper presents a modeling technique for meta-linsulator-metal capacitors up to 140 GHz realized in a high performance 0.25 μm SiGe BiCMOS process. The presented modeling technique is also applicable for different semiconductor technologies. Starting from the parasitic effect of capacitor plates until the substrate and ground effects, the method implemented here includes all the significant parasitic...
AutoDock is a popular software for the bioinformatics related molecular docking problem. The FPGA-based acceleration of AutoDock is presented and evaluated in this paper. The implementation applies pipelines and fine-grained parallelization, and achieves a ×10-40 speedup over a 3.2 GHz CPU. Test runs show that the overall accuracy of the algorithm was preserved despite the slight modifications of...
To transfer functionalities from software to dedicated hardware is necessary when the performance of the available DSP processor can not achieve the required constraints. The hardware implementations of pipeline-folding 64-Tap filter modules used in a heavy ion accelerator for real-time digital signal processing are described in this paper. Pipeline-folding mechanism is applied to the hardware designs...
Research and development activities are ongoing to design the front-end chip for the hybrid pixel sensors that will equip the Micro-Vertex Detector of the PANDA experiment at GSI. In its final implementation the ASIC will incorporate more than lOfe channels. The analog and digital electronics necessary to amplify the detector signal and to digitize the charge information with low power consumption...
Speeding up the data rate in today's fiber optical networks requires a sophisticated higher order modulation. For this purpose high speed ADCs and DACs are necessary with sampling rates above 25 GS/s and a resolution of 6 bit. This drives the combined data rate to 150 Gbit/s. To realize a cost-efficient and fully scalable measurement system for the characterization of the high speed ADCs and DACs,...
In this paper a new technique of utilizing parallel sigma delta modulation for high frequency switch mode digital power amplifiers is presented. This approach allows achieving a factor of two increase of a digital logic speed for band-pass SDM with minor adjustments made. A universal scheme for a SDM system transformation is provided. Since the transformation scheme is established, a parallel low-pass...
Current sensing is a widely used technique for reading out sensors. However, its application becomes challenging in presence of very low level of signals such as those generated by nanosensors. Thus, the characterization of noise plays a fundamental role for determining the limits of detection of the electronic interface. Two general approaches are followed for achieving low-noise current sensing...
To find a set of coefficients and check the possible performances against the specs is just the first part of the sigma delta ADC design process. By means of the potentiality offered by Labview™, a tool implementing the main classes of single bit ADC converter using feed forward or feed backward control loops, is presented. Multi bit architectures featuring cascading (MASH) architectures to cover...
A Multi-band CMOS front-end was designed and fabricated in a 0.13μm CMOS process. The front-end employs a common-gate low noise amplifier (LNA) with capacitive cross coupling (CCC) technique and a double balanced mixer. The band selection is performed by switching capacitors in and out of the LNA load, changing the resonance frequencies ranging from 2.5GHz to 4.5GHz in 16 different frequency bands...
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