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Virtual P-N diodes are emulated in undoped SOI films by biasing the front and back gates such as to induce electrostatically doped regions. The I-V curves are diode-like and can be engineered via gate voltage. We exploit the characteristics of the virtual diode for lifetime characterization, which was considered as a very challenging task in ultrathin SOI films. Two original methods are proposed and...
Z2-FET, a partially gated diode, was explored for ESD application due to its sharp switching behavior [1,2]. 1T-DRAM application of Z2-FET has recently been evidenced [3,4] leading to an even stronger interest for this device. However, a deep explanation of physical phenomena involved in Z2-FET operation has not been proposed yet. In this paper, we pro-vide a detailed description of the Z2-FET DC...
A2RAM belongs to the 1T-DRAM family and is a potential candidate to replace the traditional 1T/1C- DRAM [1-2]. In this paper, we propose a TCAD simulation [3] methodology to assess A2RAM performance, validated through experimental measurement. It is then used to provide further insight in A2RAM and optimization guidelines.
We review the operation mechanisms of the Z2-FET underlining its attractiveness as a capacitorless DRAM memory. The main parameters that govern the memory performance are discussed based on systematic experiments and simulations.
Systematic experiments demonstrate the presence of the kink effect even in FDSOI MOSFETs. The back-gate bias controls the kink effect via the formation of a back accumulation channel. The kink is more or less pronounced according to the film thickness and channel length. However, in ultrathin (<10 nm) and/or very short transistors (L < 50 nm), the kink is totally absent as a consequence of super-coupling...
The supercoupling effect is demonstrated experimentally by monitoring the electron and hole currents in a field-effect transistor provided with p+ and n+ contacts. According to the polarity of the voltage applied to the front and back gates, only electrons or holes can be detected in 7-nm thick silicon layers. Thicker layers are not affected by supercoupling and can accommodate electrons and holes...
We demonstrate experimentally a capacitorless IT-DRAM fabricated with 28 nm FDSOI. The Z2-FET memory cell features a large current sense margin and long retention time at T = 25°C and 85°C. Systematic measurements show that Z2-FET exhibits negligible OFF-state current at low drain/gate bias and is suitable as a low-power embedded memory.
Motivated by the TFET (tunneling field effect transistor) technology, we investigate the temperature and gate overlap/underlap influence on the capacitance of p-i-n diodes fabricated with UTBB FDSOI. The underlap-overlap architecture modifies the split capacitance curves essentially when the back interface is depleted. As a result, the extracted front gate oxide (tOX) and silicon film thickness (tSi)...
Focusing on the channel length scalability, this paper analyzes the coupling coefficient (body factor) in thick (25nm) and thin (7nm) UTBB SOI devices. Experimental data and simulations demonstrate that the supercoupling effect further improves the device scalability and operation in thin silicon films. The impact of thinning the gate oxide and body on the inter-channel coupling is also documented.
Doped InGaAs were characterized using a revisited pseudo-MOSFET configuration. Two different conduction mechanisms were evidenced: volume and interface. The impact of film thickness, channel width and length is evaluated. Measurements at low temperatures complete the analysis.
Nanosize SOI materials and devices feature two oxides, three interfaces and two possible channels, more or less overlapped. This complexity cannot be addressed with conventional characterization methods developed for bulk-Si devices. We review appropriate techniques efficient in FDSOI structures. The latest advances in pseudo-MOSFET method are described and selected examples illustrate the properties...
We investigate the supercoupling effect in N and P-type UTBB SOI transistors with dynamic threshold operation. The transconductance and mobility are analyzed for two silicon film thicknesses in conventional (grounded back gate) and dynamic threshold (eDT: VG2=kVG1) modes. Experiments show that the supercoupling enhances the volume inversion effect and improves the impact of the k-factor, leading to...
The SOI structural characterization is addressed in this paper by using split capacitance measurements on p-i-n gated diodes. The p+ and n+ contacts supply promptly electrons and holes in the body, preventing the diode from the parasitic transient effects that undermine the capacitance measurements in SOI MOSFETs. A novel method to determine the silicon film thickness, based on the capacitance derivative,...
Multicarrier transport planar fully-depleted silicon-on-insulator MOSFETs has been investigated employing magnetic-field dependent geometrical magnetoresistance measurements and high-resolution mobility spectrum analysis. The results indicate that electronic transport in the 10 nm thick Si channel layer is due to two distinct and well-defined electron species. According to self-consistent Poisson-Schrödinger...
Tunneling-based transistors (TFETs) have attracted interest due to their (theoretical) capability of switching more sharply than MOSFETs. However, other mechanisms that take place in SOI devices can provide even more abrupt switching and higher current. We examine the family of emerging TFET-competing devices based on barrier modulation, bipolar amplification and impact ionization. Practical results...
High-resolution mobility spectrum analysis has been employed to study the magnetic-field dependent geometrical magnetoresistance characteristics of planar FD-SOI MOSFETs with 10 nm thick transistor channel layer. It is shown that transport in the Si channel is due to two well-defined electron species. According to self-consistent Poisson-Schrdinger calculations, these species correspond to carriers...
Nanometer size field effect transistors can operate as efficient resonant or broadband terahertz detectors, mixers, phase shifters and frequency multipliers at frequencies far beyond their fundamental cut-of frequency. This work is an overview of some recent results concerning the THz detection by Si MOS transistors with back-gate, low temperatures operation, and circular polarization studies of nanometer...
Experimental results show that the measurement and interpretation of short-channel effects (SCE) are misleading in advanced SOI MOSFETs. Part of SCE is due to the parasitic contribution of the back gate via channel coupling. We demonstrate that the contributions of each gate to the overall SCE can be discriminated. Numerical simulations indicate that their mutual relevance depends on the transistor...
While the scaling of MOS transistors is still ongoing, the miniaturization of the DRAM storage capacitor is reaching a critical limit. A promising solution consists of eliminating the capacitor. Instead, the charges can be stored in the floating body of an SOI MOSFET, which is also used to read out the memory states. The floating-body 1T-DRAM takes advantage of floating-body and coupling effects that...
ZnO device technology provides numerous possible TFT applications. This paper investigates the transport properties in thin nanocrystalline ZnO films. Since these devices are bottom-gate controlled, their characteristics reveal the properties of the back channel located at the interface. Guided by systematic experimental results, we focus on analytical models matching the mobility behavior in ZnO...
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