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The gate tunneling currents that are present in double-gate fully depleted fin-shaped MOSFETs either with a single high-k layer or a SiO2/high-k stack as gate dielectric material are modeled, in order to define its contributions to the total measured gate leakage current at different gate bias conditions. Direct tunneling of electrons from Si conduction band provided by all the channel region at strong...
In this paper, we develop an analytical model to simulate strained silicon NMOSFETs, which allows to describe the drain current. Numerical simulations were performed in order to validate the model, where different technological parameters were considered (e.g. impurity concentrations in Si1−yGey and strained-silicon films). A good agreement with numerical simulations has been obtained.
In this paper a new and original approach for power allocation for cognitive users is proposed. The approach is based on the application of the order statistics (maximum terms of the variation series) for instantaneous SNR levels. Contrary to the widely applied methods, in the proposed approach, power is allocated to the groups of the OFDM sub-carriers which suffer the same flat fading. It is shown...
This work presents a new architecture of analog four-quadrant multiplier in CMOS technology based on the behavior of MOSFET in the linear region from weak to strong inversion. The proposed multiplier has voltage and current inputs and a current output, thus being adequate for the implementation of compact synapses in analog Cellular Neural Network (CNN). Simulation results exhibit low power consumption...
In this work the characterization of cubic GaN epitaxial films on templates obtained by nitridation of GaAs is reported. N- or p-type materials were obtained in Undoped or Mg-doped films respectively. The use of Mg compounds results in a tendency to incorporate the hexagonal phase in the films, but this effect can be avoided adjusting the experimental parameters. The results show that the materials...
This paper presents an electronic circuit that exhibits parametric resonance, namely a parametric RLC oscillator. The circuit exploits parametric resonance in an analog application, namely, a gain-frequency dependent switch. In such circuit, when the amplitude and frequency of the parametric excitation varies then a transition curves, in the parameter space, are computed by using an algorithm that...
Multiple-gate MOSFETs are widely recognized as the most promising nanometric transistors for end of roadmap integrated circuits. These devices have therefore a great potential for low voltage, low power analog and digital applications. FinFETs fabricated on bulk wafers gained attention due to the possibility of their integration with standard bulk CMOS technology and reduced wafer cost. In the present...
We have measured gate current components from the axis perpendicular-to-the-surface. The measured channel magneto-conductance shows also a pronounced magnetic asymmetry, which suggests the channel current is flowing into different crystallographic orientations with different effective masses and hole mobilities. By monitoring the different crystallographic components of the hole flow we have enhanced...
In this paper we present a physics-based analytical model for the gate capacitance Cg in AlGaN/GaN HEMT devices. A continuous and analytical expression for the 2-DEG charge density ns is developed from the consistent solution of Schrodinger's and Poisson's equation in a quantum well with triangular potential profile. The developed ns expression is used to derive the model for Cg. The proposed model...
The feature sizes of short channel Si MOSFETs and FINFETs are now in the range, where ballistici or quasi-ballistic transport is dominant. In this regime, conventional notion of electron mobility becomes invalid, and electrons lose energy and momentum in the contacts rather than in the device channel. In these devices, electron inertia plays an important role, and oscillations of the electron density...
For sub 22 nm technologies the use of both Ge and III-V based devices is extensively investigated because of their promising electrical performances. However, for both types of devices it is of utmost importance to achieve ohmic contacts with a low specific contact resistivity in the order of 1×10−8 Ωcm2 or below. This paper reviews some basic aspects and recent insights in contact technology schemes...
The design of a miniaturized broadband 4 × 4 Butler matrix has been presented. The designed Butler matrix utilizes the developed single-section coupled-line 3-dB/90° directional couplers designed with the use of a quasi-lumped element technique. The broadband 45° phase shifters have been realized as a tandem connection of two such couplers providing simultaneously transmission-line crossover. The...
The interpenetrating network morphology of the organic solar cells was investigated using a blend of P3HT:PC[70]BM at ratio of 1:0.84 wt%. To analyze the dependence of organic solar cell efficiency on the morphology of the composite was used atomic force microscopy (AFM) and transmission electron microscopy (TEM). It is experimentally identified the phase-separated domain size that is formed and distributed...
This paper introduces an analytical method for calculating the equivalent inductance associated to signal vias in parallel planes with arbitrary power/ground (P/G) via distribution. The proposal is corroborated by comparing the equivalent inductances predicted by a commercial electromagnetic solver (HFSS) and those predicted by the analytical method. Excellent results are obtained demonstrating the...
The design of a ball grid array metalized particle interconnect (BGA MPI) socket is presented. A novel design using static force system using less force and components instead of a dynamic one is shown. The performance of MPI socket has been characterized mechanically as deformation value and electrically as S parameters for different compression force. The MPI has been validated at laboratory using...
In this paper, a methodology for combined simulation (co-sim) of power and signal to ensure a proper signal-to-power-ground ratio in vertical connections is presented. Capturing the vertical return current, power-to-signal, and signal-to-signal crosstalk simultaneously and accurately requires the modeling of the entire memory channel using 3D tools. Combined simulations allow a highly sensitive analysis...
This work presents a study of the influence of mechanical stress on the low frequency noise in planar SOI transistors operating in saturation. Several channel lengths were measured, and the results show a reduction of the low frequency noise for strained devices independent of the channel length, and this reduction is more effective for smaller channel lengths.
The electron transport in electroformed W/CeOx/SiO2/NiSi2 capacitors grown onto a p+-type Si substrate is investigated within the framework of the Landauer theory for mesoscopic systems. It is shown that the devices exhibit bipolar resistive switching with conductance levels in the low resistance state (LRS) of the order of integer and half integer values of the quantum conductance unit G0= 2e2/h...
Gate leakage is one of the important parameter expected to limit the performance of Tunnel FETs. We have simulated the effect of gate dielectric thickness on gate leakage in Tunnel FETs, using two dimensional numerical simulations. It has been observed that gate leakage considerably affects the subthreshold characteristics of TFETs. It was found to be most important component of off-state current...
Analog integrated circuits (ICs) design is a complex task due to the large number of input variables that must be determined simultaneously in order to achieve different multiple design goals of an analog integrated circuit design, such as voltage gain (AV), unit voltage gain frequency (fT), slew-rate (SR), harmonic distortion (THD), etc. By using an evolutionary system based on Genetic Algorithm...
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