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Intelligent connected sensor and actuator endpoint nodes enable the Internet-of-Things (IoT). A brief overview of endpoint node functional blocks and requirements for low-power consumption are discussed. VLSI technology enablers for IoT include Ultra low Power (ULP) and Ultra Low Leakage (ULL) semiconductor process platform extensions. ULP and ULL implementations for bulk silicon technologies are...
Intelligent connected sensor and actuator endpoint nodes enable the Internet-of-Things (IoT). A brief overview of endpoint node functional blocks and requirements for low-power consumption are discussed. VLSI technology enablers for IoT include Ultra low Power (ULP) and Ultra Low Leakage (ULL) semiconductor process platform extensions. ULP and ULL implementations for bulk silicon technologies are...
High-voltage ICs (HVICs) are used in many applications, including ac/dc conversion, off-line LED lighting, and gate drivers for power modules. This paper describes the technologies most commonly used in commercial HVICs, including junction-isolation, thin silicon-on-insulator (SOI), and thick SOI approaches. Emerging technologies such as thin silicon membrane are also discussed.
In this paper a fully isolated bulk Si RF LDMOS device platform is reported which has been optimized for highly efficient mobile power conversion and RF power amplification. The self-aligned RF LDMOS NFET achieves a specific on-resistance Rds, on of 0.94 ohm-mm2, a breakdown voltage >9V, an Rsp∗Qgg product of 8.3 mohm nC, and a cutoff frequency Ft > 43 GHz. Complementary PFET RF LDMOS exhibit...
In this paper, we introduce an isolated RF LDMOS NFET is for RF Power Amplifier (PA) and power management applications. The RF LDMOS NFET has demonstrated a drain-source turn-on resistance (Rds,on) of 1.45ohm-mm, a cutoff frequency (Ft) greater than 40GHz and a drain-source breakdown down voltage (BV) in excess of 9V. For PA designs, the isolation layer is floating to reduce the parasitic and achieve...
A System-On-Chip (SOC) demonstrator integrating a low-noise IEEE 802.15.4 Transmitter and a DC-DC converter on a 0.18um High Voltage (HV) and RF CMOS process is presented in this paper. Noise isolation performance is critical to success of this type of SOC. A complete direct conversion transmitter was designed and various Quadrature VCO topologies were analyzed and compared based on the phase noise...
A novel JFET redesign of a laterally scaled P-LDMOS device is presented. The P-LDMOS device has excellent Rsp as it is scaled from 90V to 170V operation. This P-LDMOS design is modified to produce a 100V PJFET with good turn-off characteristics and a relatively low Vpinch of 3–7V.
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