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This paper presents a 3-FET stacked K/Ka-band class-AB power amplifier (PA) implemented in the GLOBALFOUNDRIES 45nm SOI process that is particularly optimized for future high-performance energy-efficient 5G mm-Wave transceiver front-ends. With a 2.9V power supply, the PA achieves 13.1dB power gain and a saturated output power (Psat) of 16.2dBm with a maximum power-added efficiency (PAE) of 41.5% at...
In this paper, we discuss a DC-20GHz single-pole double-throw (SPDT) transmit/receive switch (T/R switch) design in 45nm SOI process. This circuit is dedicated to fully integrated CMOS RF front end modules for X/Ku band satellite communication applications. The switch exhibits a measured insertion loss of 0.59dB, return loss of 23dB, and isolation of 17dB at 14GHz. The input 1dB compression point...
In this paper, we first analyze an LNA core, cascode structure cut off frequency and power gain relationship with device parameters. Then we discuss the LNA design differences between FET LNA and SiGe LNA during design optimization. SOI floating body FETs have advantages in higher Ft in the optimized current biased region and can offer more design flexibility, while SiGe NPNs need much less trade...
In this paper, we present 2.4/5.5 GHz LNAs with SPDT Switch for WiFi Front-End Modulate Integrated Circuit (FEM IC) based on high resistivity substrate 0.35um SiGe BiCMOS process. For the 2.4GHz LNA, the bias circuit's effect on the nonlinearity is analyzed and measured, and then a new bias circuit is proposed. With 2.7V supply, it consumes 4.2mA current. The measured Gain is about 14.6dB with input...
In this paper, we introduce an isolated RF LDMOS NFET is for RF Power Amplifier (PA) and power management applications. The RF LDMOS NFET has demonstrated a drain-source turn-on resistance (Rds,on) of 1.45ohm-mm, a cutoff frequency (Ft) greater than 40GHz and a drain-source breakdown down voltage (BV) in excess of 9V. For PA designs, the isolation layer is floating to reduce the parasitic and achieve...
A System-On-Chip (SOC) demonstrator integrating a low-noise IEEE 802.15.4 Transmitter and a DC-DC converter on a 0.18um High Voltage (HV) and RF CMOS process is presented in this paper. Noise isolation performance is critical to success of this type of SOC. A complete direct conversion transmitter was designed and various Quadrature VCO topologies were analyzed and compared based on the phase noise...
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