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The design and development of digital electronic systems is mainly performed by use of a hardware description language. To prepare students in electrical engineering for a career in hardware design many universities provide courses on VHDL. The traditional approach in teaching VHDL is mainly by means of textbook examples and simulation provided by software applications. These exercises are perceived...
In many real-world applications, the accurate number of clusters in the data set may be unknown in advance. In addition, clustering criteria are usually high dimensional, nonlinear and multi-model functions and most existing clustering algorithms are only able to achieve a clustering solution that locally optimizes them. Therefore, a single clustering criterion sometimes fails to identify all clusters...
By neatly reserving routing resources of an FPGA at design-time, a circuit switching network can be implemented for integrating reconfigurable modules in a two-dimensional manner at run-time. In this network, paths can be set directly by manipulating fractions of the switch matrix configuration. By utilizing disjoint resources for implementing the network and the modules of the system, the network...
In this paper, we show how short-circuits on FPGAs can be caused by partial runtime reconfiguration. Short-circuit can even occur on FPGAs that do not offer any tristate resources just by using off the shelf vendor tools without any bitstream manipulation. The duration of the here presented short-circuits ranges from short spikes up to persistent short-circuits that remain active during runtime. Short-circuits...
The paper deals with evolutionary design of impulse burst noise filters. As proposed filters utilize the filtering window of 5times5 pixels, the design method has to be able to manage 25 eight-bit inputs. The large number of inputs results in an evolutionary algorithm not able to produce reasonably working filters because of the so-called scalability problem of evolutionary circuit design. However,...
We propose a field programmable gate array (FPGA) implementation for a run-time adaptable evolvable hardware classifier system. Previous implementations have been based on a high-level virtual reconfigurable circuit technique which requires many FPGA resources. We therefore apply an intermediate level reconfiguration technique which consists of using the FPGA lookup tables as shift registers for reconfiguration...
Efficient heuristics are required for on-line optimization problems where search-based methods are unfeasible due to frequent dynamics in the environment. This is especially apparent when operating on combinatorial NP-complete problems involving a large number of items. However, designing new heuristics for these problems may be a difficult and time-consuming task even for domain experts. Therefore,...
A pattern recognition system that can process a large amount of image data at high speed is required in many fields. In this paper, we propose an on-chip pattern recognition system that utilizes the reconfigurability of the FPGA. The features of the system are not only very high recognition speed but also an adaptive function. For example, when objects to be detected change appearance, recognition...
One of the main challenges with autonomous adaptable systems is the lack of hardware flexibility. However, reconfigurable logic is a promising technology for run-time adaptable systems ?? often called reconfigurable computing. The paper outlines how reconfiguration can be applied at run-time for an on-line evolvable system to improve flexibility in the hardware. The challenge of the latter is to include...
A conceptual framework for online evolution in robotic systems called indirect online evolution (IDOE) is presented. A model specie automatically infers models of a hidden physical system by the use of gene expression programming (GEP). A parameter specie simultaneously optimizes the parameters of the inferred models according to a specified target vector. Training vectors required for modelling are...
Evolvable hardware has shown to be a promising approach for prosthetic hand controllers as it features self-adaptation, fast training, and a compact system-on-chip implementation. Besides these intriguing features, the classification performance is paramount to success for any classifier. However, evolvable hardware classifiers have not yet been sufficiently compared to state-of-the-art conventional...
In the not so distant future, robots looking like humans may be part of our everyday lifestyle. Then it would be important that they provide a natural behaviour and mimic. To make this possible, the way artificial skin is controlled by a number of actuators would have to be addressed. In this paper, we compare a number of partly novel algorithms for adapting to a number of different eye brow expressions...
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entirely hardware-based in order to increase the speed of the circuit evaluation which uses a large training set (360 images/23040 bytes). The fitness evaluation time for 1000 generations consisting of 16 individuals is 623 ms,...
Adaptation would be important in making security systems able to protect against new kind of attacks. This paper argues that this should also involve hardware being updated and adapted according to new protection patterns. Performance, speed and cost could be improved by applying dynamic hardware. This is possible by the application of reconfigurable logic devices. There are several schemes for doing...
Reconfigurable computing has grown to become important in hardware design. In autumn 2005, we taught for the first time a new course in digital system design with its main focus on FPGA technology and design using VHDL. This paper reports about the various issues dealt with including what topics to cover, text book selection, lab exercises etc. A summary of the students feedback is also included.
The lifetime of electronic parts has decreased over the years. The result is that companies designing embedded systems with long life-time would have problems. Thus, there are problems with manufacturing the products for as many years as they would like to as well as being able to provide spare parts for customers. To be able to analyze the extent of the problem as well as learning about how the industry...
Reconfigurable software has been applied for a long time. Reconfigurable technology also provides possibility for reconfiguring hardware but this has not been much exploited so far. In this paper, a flexible processor architecture is proposed that allows for variable resolution in data variables at run-time. Experiments are undertaken for an image processing task where the results show that the approach...
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an on-chip processor. This gives higher flexibility compared to implementing an evolutionary algorithm directly in hardware, since the parameters and behaviour of the algorithm can easily be changed, and complex operators are more feasible...
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