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SiGe HBT technologies have increasingly seen improvements in their maximum operating speed. These are attributed to aggressive vertical and lateral device scaling. While the latter is generally captured by scaling equations for model parameters, physical effects caused by the former need to be described by the model equations. Examples for effects that gain importance with shrinking device dimensions...
It is demonstrated that the external collector resistance, representing the voltage drop from the collector terminal to the internal collector node, and the corresponding time constant can have a large impact on the extraction of geometry scalable compact model parameters for bipolar transistors. Furthermore, the accuracy of two widely used extraction methods is evaluated based on data obtained from...
A new analytical static drain current model based on the WKB approximation has been developed for Schottky-Barrier CNTFETs. Electron scattering by acoustic and optical phonons in the channel has been taken into account. By using a simple approximation of both the Fermi-Dirac distribution function and transmission probability, an analytical expression for the drain current in the Landauer-Büttiker...
The cut-off frequencies of silicon-germanium hetero-junction bipolar transistors (SiGe HBTs) have entered the THz range at the cost of high current density and relatively low breakdown voltages. Typically, the common-emitter breakdown voltage with open base (BVCEO) is used to indicate the allowed breakdown voltage related operation limit. However, an open base (i.e. an infinite source impedance) is...
The performance of Silicon nanowire (NW) FETs with multiple parallel cylinderical channels can significantly be affected by screening effects depending on the gate structure. This work analyzes electrostatic screening effects in single gate (SG) and double gate (DG) structures and compares the related transistor performance to gate-all-around (GAA) Si nanowire (NW) FET structures. As a measure for...
Compact model results for SiGe HBTs with an fT of 340 GHz and an fmax of 560 GHz are presented with a focus on geometry scalable modeling and the corresponding abilities for a detailed evaluation of process performance. The parameter extraction is outlined with an emphasis on device scaling and parasitic series resistance extraction. Very accurate model results are obtained for single geometry devices...
High frequency (h.f.) noise characteristics of advanced InP and GaAs HBTs were measured and simulated. The compact model (CM) HICUM/L2 v2.34 was used for the DC, AC and noise simulation as well as for the noise analysis. Geometry scalable model parameters for InP HBTs with the different emitter widths and lengths were extracted from temperature dependent DC and AC measurements on HBTs and special...
Top gate, global back gate and buried gate CNTFET structures with a channel length of 5.9 nm are studied in the scope of the 2026 ITRS requirements. The studies are performed using a numerical device simulator. Figures of merit and performance parameters such as the switching speed, the switching energy, Ion/Ioff-ratio, among others, are obtained for each structure and compared with the 2026 ITRS...
Although latest developments in Si BJTs and SiGe HBTs typically focus on high-speed devices and strong competitors for high-voltage (HV) devices exist (e.g. GaAs HBTs and HEMTs), HV Si BJTs still find widespread application. This paper demonstrates the application of HICUM/L2 to Si BJTs with very high breakdown voltages and highlights the model features that are relevant for the most prominent properties...
Benchmark circuit are small circuit blocks that resemble the major features of the active and passive devices for a given process technology. Such blocks are attractive for verifying the compact models delivered in process design kits as well as for demonstrating the process performance at the earliest possible time. This paper presents results of two broadband Darlington amplifier versions that were...
The state-of-the-art and π-models for the lateral non-quasi-static (NQS) effect are analyzed. The superiority of the π-model to capture the lateral NQS effect is demonstrated through small-signal simulations of both the models, implemented in Verilog-A. A hybrid model is proposed and a corresponding formulation of the base impedance is obtained. The equation gives the base impedance of the state-of-the-art...
Reconfigurable field effect transistors (RFETs) are attractive for analog applications exploiting their inherent switch-ability from n-type to p-type behavior. Simulation studies by means of an experimentally calibrated 3D numerical device simulator reveal that the recently proposed simplified single gate (SG) RFET architecture leads to a two times larger intrinsic transit frequency while providing...
An overview on the implementation of new physical effects into the heterojunction bipolar transistor compact model HICUM/L2 is presented along with a description of the quality testing procedures performed before its public release for production circuit design in commercial simulators. Related topics such as potential measures for model run time improvements and failures are also discussed. Significant...
This chapter provides an overview on the advanced compact bipolar transistor model HiCuM in terms of the modelling approach with respect to circuit design. The relevant physical effects occurring in modern heterojunction bipolar transistors (HBTs) are briefly described with the main focus on SiGe HBTs. Geometry scaling, a statistical design methodology, and parameter extraction methods in an industrial...
SiGe HBT technology transistor provides performance comparable with III-V technologies along with the processing maturity and integration levels commonly associated with Si technology. The present work utilizes 130nm SiGe HBT transistors to investigate the performance of low noise amplifier (LNA) for 40GHz and 60GHz wireless personal area networks (WPANs). The transfer gain S2i was found >9dB with...
Enabling the vast computational and throughput requirements of future high performance computer systems and data centers requires innovative approaches. In this paper, we will focus on the communication between computer boards. One alternative to the bottleneck presented by copper wire based cable-bound communication is the deployment of wireless links between nodes consisting of processors and memory...
An overview on the compact modeling activities within the DOTSEVEN project is given. Issues such as geometry scaling, substrate coupling and thermal effects as well as HICUM Level 2 features enabling the accurate modeling of the linear and non-linear characteristics of the latest generation of SiGe HBTs are discussed. Furthermore, experimental results for the most important DC and small-signal characteristics...
Three different methods for the extraction of the contact resistance based on both the well-known transfer length method (TLM) and two variants of the Y-function method have been applied to simulation and experimental data of CNTFETs and the results have been compared. While for TLM special CNT test structures are mandatory, standard electrical device characteristics are sufficient for the Y-function...
RF-linearity at device level is becoming increasingly valuable for future communication systems. It has recently been reported that Schottky barrier (SB) CNTFETs offer high linearity under realistic conditions. In this paper, the potential of SB-CNTFETs for high RF-linearity is studied. The latter demands a compromise between excellent Schottky barrier control and high extrinsic high-frequency performance...
Detailed formulations for DC and AC emitter current crowding are presented in view of developing an extended π-equivalent circuit (EC) model to accurately predict the lateral non-quasi-static effects in silicon germanium heterojunction bipolar transistors. Under negligible DC current crowding, the EC reduces to a simple π-model. The implementation-suitable versions of the models are also developed...
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