Compact model results for SiGe HBTs with an fT of 340 GHz and an fmax of 560 GHz are presented with a focus on geometry scalable modeling and the corresponding abilities for a detailed evaluation of process performance. The parameter extraction is outlined with an emphasis on device scaling and parasitic series resistance extraction. Very accurate model results are obtained for single geometry devices as well as for transistors with a wide distribution of emitter geometries, allowing a deembedding of the corresponding 1D HBT performance.