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With the growing demand for mechanically flexible electrical systems and the increasing level of integration of electrical assemblies, hybrid build-ups combining polymer substrates and ultra-thin flexible silicon chips (system-in-foil) are getting more and more important. These systems need thin chips which maintain their functionality even in bent condition as well as reliable handling and assembly...
The last decade, an important effort has been allocated to emergent nanomaterials as an alternative route to current silicon-based technologies in order to face physics issues appearing with the downscaling of electronics components (Moore's law). In this paper, studies on DNA material have been conducted in order to take advantage of both DNA nanoscale and auto-assembling properties. The combination...
Glass provides many opportunities for advanced packaging. The most obvious advantage is given by the material properties. As an insulator, glass has low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust the coefficient of thermal expansion gives advantages to manage warp in glass core substrates and bonded stacks for both through glass vias (TGV)...
As electronic products becomes smaller and lighter with an increasing number of function, the demand for high density and high integration becomes stronger. Interposers for system in package will became more and more important for advanced electronic systems. Silicon interposers with through silicon vias (TSV) and back end of line (BEOL) wiring offer compelling benefits for 2.5D and 3D system integration;...
As the size of microbumps continues to shrink, the amount of solder decreases gradually, resulting the brittleness of solder joints due to formation of intermetallic compounds. Low-temperature Cu-to-Cu direct bonding appears to be one of the solutions for fine-pitch microbumps for 3D IC packaging. However, the high bonding temperature and pressure are the main problems of this approach. We achieve...
Three-Dimensional (3D) integration of group III-V compound semiconductor material on Si wafer (III-V/Si) is important for next-generation microsystems such as Si photonics or ultra-high-frequency electronics. A technique for direct bonding of III-V chips on a large-diameter Si wafer is an attractive approach for manufacturing these structures, but there is a difficulty in that ultra-clean particle-free...
Ag sintering has been widely studied as a lead-free die attach solution for power electronics. A soak time of a dozen minutes at the sintering temperature is necessary to establish strong bond strength by the conventional heating method. Chemical bonding can be achieved by various parameters associated with the metallurgical bond of the adjacent surfaces. In this study, attaching technology between...
This paper presents our latest results from the investigation of the surface oxide content in boron capped layers used as the entrance window in ultraviolet silicon (UV-Si) photodetectors. These photodetectors have been studied electrically and optically to define the correlation between oxide content and performance, i.e. the direct relationship between the amount of undesired surface oxide in the...
Since the successful introduction in the Western economic area of Atomic Layer Epitaxy (ALE) by Suntola's team [1] the technique more extensively known as Atomic Layer Deposition (ALD) has been slowly gaining acceptance in the field of thin film deposition [2]. There are many benefits of ALD, however, in terms of deposition rates and management of reactive gas species in complex 3D structures (such...
The low-k dielectric materials in wafer fabrication are widely used. The current advanced mechanical dicing is not able to meet the requirement of low-k technology, since the low-k materials are harder and brittle. Laser dicing is developed for low-k wafer dicing. There are various laser dicing techniques in the market. Depending on the wafer thickness, laser dicing can either be a though cut or a...
TSV CMP processes on bonded wafers include TSV backside CMP revealing process and TSV Via last CMP process. The patterned and thinned device wafers are temporarily bonded on silicon carrier, which results in huge TTV (total thickness variation). Such TTV makes CMP processes more challenging. In this paper, CMP processes on bonded wafers are studied. Cu and barrier layer are successfully and fully...
Promoted by the component miniaturization trend, three-dimensional integration appears as a promising option for implementation of the next generation of integrated circuits. In this context, copper is still an interesting material to be integrated to vertical interconnexion through direct metal-metal bonding processes. However, it was already reported that voiding phenomena occur in bonded copper...
Here we investigate the feasibility of detecting the photo-reversible inter-conversion between the two thermo-dynamically stable states of the photochromic molecule spiropyran, using silicon microcantilever sensors. The merging of microcantilever technology and spiropyran photochromic brushes for the first time, offers a good route for the pairing of a sensitive transducer with a sensing surface which...
Capacitive Micromachined Ultrasonic Transducers (CMUTs) are generally fabricated either by conventional sacrificial release process or by wafer bonding technique. In the former, sacrificial layers are patterned with deposited materials on the substrate. This current work reports a development on the aforementioned technique wherein sacrificial islands are embedded inside grooves opened by DRIE in...
A novel technology for low temperature (LT, 400°C) boron deposition is presented providing a uniform, smooth, and closed boron layer. The temperature dependency of the boron deposition is discussed. Some provisions are recommended to minimize the undesirable boron deposition on oxide surfaces. This technology is successfully employed to create near-ideal LT PureB photodiodes with low, deep-junction-like...
This paper presents the electrical characterization of low power CIGSSe photovoltaic (PV) modules. Such investigation is achieved to perform a comparison of their performances with conventional silicon PV modules. For this purpose, a test bench, suitable for the characterization of both traditional and innovative low power modules, has been set-up and experimental results are accurately described...
Luminescent properties of heterogeneous composite systems based on nanosilicon nc-Si and silica aerogel matrix ar-SiOx have been investigated using photoluminescence spectroscopy method. The photoluminescence sensor response of composite structures at the presence of water molecules and ethyl alcohol solutions has been investigated.
This paper presents an approach to derive a novel 3D signature based on the micro-geometry of paper surfaces so as to uniquely characterise and classify different paper substrates. This procedure is extremely important to confront different conducts of tampering valuable documents. We use a 4-light source photometric stereo (PS) method to recover dense 3D geometry of paper surfaces captured using...
In this study, a novel polyvinyl alcohol-capped palladium colloids is synthesized and applied as the catalyst for electroless plating (ELP) of nickel-phosphorous (Ni-P) film on a silane compound-modified silicon surface. Analyzed by scanning electron microscopy, water contact angle and X-ray photoelectron spectroscopy, it is found that the interaction between PVA-Pd and amino groups on ETAS is the...
The advancement of silicon scaling to 14/16 nanometer (nm) in support of higher performance, higher bandwidth and lower power consumption in portable and mobile devices is pushing the boundaries of emerging packaging technologies to smaller fan-out packaging designs with finer line/spacing as well as improved electrical performance and passive embedded technology capabilities. Advanced embedded Wafer...
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