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In this paper, we present a detailed study on surface nanostructuration of <100> orientedp-type Silicon using a Cu assisted chemical etching. Scanning Electron Microscopy was used to describe the evolution of the surface morphology and structures during etching. The results show that the formation of either pyramids or inverted pyramids is mainly dependant on the etching time. Well-defined large-scale...
The effect of varying plasma etching process time on alkaline textured mono-crystalline silicon has been investigated and applied for industrial process. Reduced surface reflectance is observed for longer plasma etching process time, with the tradeoff having lower effective carrier lifetime induced by plasma damage. The degradation is further caused by the mismatch of the surface morphology and ionic...
We explore the use of a class of metasurface (MTS), which consists of metalized cylinders arranged in a square lattice and placed on a ground plane, for the realization of antennas at terahertz (THz) frequencies. This MTS is particularly appropriate for being micromachined out of a silicon wafer by means of deep reactive ion etching (DRIE).
Experiments confirmed that the process of plasma chemical etching of silicon in chlorine containing plasma is well compatible with a photoresist mask. Dependences of rate of plasma chemical etching of silicon on value of flows of oxygen and freon, anode current, sample location in the reactor, physical characteristics of silicon sample, etching time are studied. The plasma chemical etching of silicon...
We experimentally observe effects of second harmonic generation, nonlinear absorbtion in porous quartz with metallic nanoparticles in order to find a possibility to make a new device for SERS-experiments.
Sulfur hexafluoride (SF6) plasmas are commonly used in the deep etching of silicon (Si), silicon oxide (SiO2) and more recently silica glass [1]. Due to the complexity of fluorinated plasma environment during Si-based material etching, there are few works presenting experimental and/or theoretical studies about the chemistry established. However, the chemical behavior of the plasma has a direct influence...
The performance of a novel diode with characteristic trench shape is predicted by TCAD simulation. A novel 600 V vertical PiN diode with hole pockets by the Bosch deep trench process is proposed for a better trade-off curve between reverse recovery loss and forward voltage. The reverse recovery loss is reduced to a half. In addition, the active chip size of the novel diode is reduced to two-thirds...
Revascularization procedure for peripheral arterydisease is dependent on surgeon's skill and experience for asuccessful procedure. An integrated sensor on guidewire isproposed to reduce such dependency during the procedure. The development and packaging of the sensor with a hybridsilicone-polymer substrate (HSPS) and a silicon stopper arepresented in this paper. A compact HSPS (0.4mm x 10mm x0.31mm)...
Through silicon vias (TSV) are the enablingcomponents in the emerging 2.5D and 3D integrationmicroelectronic packaging. The insulation layer, i.e. the liner, plays the key role in determining the performance of TSV. Polymer liner are receiving a growing attention for its moresuitable properties and simpler processing compared to thetradition silicon dioxide (SiO2) liner. Recently we reported anovel...
Through silicon vias are key components in 2.5D and 3D microelectronic packaging. Deep silicon etching is the critical step in fabrications of TSVs. Uniform metal-assisted chemical etching (MaCE) has been considered as a promising method to the conventional deep reaction ion etching for deep silicon etching. In this paper, we demonstrated that the uniform MaCE method is capable of fabricating vertical...
Three-dimensional integration with throughsilicon vias is becoming essential for the future of the microand nano-electronics industry. The ability to incorporate multiple wafers and systems in a single design is revolutionizing device packaging. However, the complexity in the fabrication of through-silicon via structures and the reliability concerns must be addressed. In this work the effects of the...
MEMS devices are continuous evolving to achieve smaller size and lower cost with improved performance. The Through silicon via (TSV) technology offers a promising approach from the perspective of MEMS device packaging and integration. In this paper, we report our latest progress on wafer level packaging of MEMS devices by via-last process. The 200mm MEMS wafer was bonded with a glass cap wafer. Then,...
TSV backside reveal is one of the key process modules for enabling 2.5D integration. This paper presents a robust and low cost solution for TSV backside reveal. 300mm wafers with a TSV size of 10µm×100µm are used to evaluate the proposed backside reveal solution. A high selective wet etching process with an etch rate of about 15 µm/min is used to replace conventional Si dry etching step for Si recess...
Theoretical studies guided the experimental work for a novel fabrication methodology of asymmetric textured Silicon nanocones (SiNCs) through Metal-assisted chemical etching followed by oxidation. Optical numerical and Experimental studies showed a promising antireflective broadband property at angles up to ±60° combined with an inherent self-cleaning Property.
This work presents the glass reflow process for microsystems. In this process, glass compounded silicon structures are achieved with the help of vacuum cavities under a high temperature. Three applications employing the glass reflow process, through-wafer interconnects, thermal isolation, and optical window, have been proposed and investigated.
This paper describes electrical characteristics of bumpless and dual-damascene TSV interconnects for three-dimensional integration (3DI) using Wafer-on-Wafer (WOW) technology. Process optimization counter to integration issues of TSV formation process is demonstrated using test vehicle fabricated with 300-mm wafer and characterized by chain resistance and leakage current in the wafer level.
Pattern-dependent non-uniformities were studied in this work focusing on a depth loading effect in 28 nm node STI. Both positive and negative depth loadings, which mean the trench depth difference between isolated and dense structures, were observed depending on selected gas chemistry. It has been shown that by utilizing a Cl2/O2/N2 plasma for Si patterning, a negative depth loading was more attributive:...
3D WLCSP using via last TSV (through silicon via) technology is an ideal packaging technology to meet small-form-factor, lightweight, low-profile, high I/O density, high-speed and most important, lower cost. For thin 3D WLCSP with TSVs, a number of critical processes need to be developed. Because of the applying of the temporary adhesive for device and carrier wafer bonding, process integration steps...
NANO cantilevers are one of the basic Nanomechanical structures. They are fixed at one ends and the other ends can move freely like a diving board. Their sizes are in the micrometer and nanometer ranges. Nano cantilevers are called Nano cantilever sensors when their surfaces are functionalized to detect specific molecules. Since these sensors have offered remarkable possibilities in detection, they...
Recently many issues came up when using conventional dicing methods. Such conventional methods are mechanical sawing (blade dicing) or laser dicing or stealth dicing. Relevant applications are thin wafers, brittle materials and wafer singulation for very small devices or LED or discretes. Plasma dicing is a recommended method to overcome many challenges of wafer separation. Damage free, water free,...
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