The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Pattern-dependent non-uniformities were studied in this work focusing on a depth loading effect in 28 nm node STI. Both positive and negative depth loadings, which mean the trench depth difference between isolated and dense structures, were observed depending on selected gas chemistry. It has been shown that by utilizing a Cl2/O2/N2 plasma for Si patterning, a negative depth loading was more attributive:...
The plasma resistant materials, such as yttrium oxide (Y2O3), are synthesized as a coating to protect the surface of the key components, such as showerhead (SH), for the plasma etching chamber. When the F contained plasma is used in the etching process, the inorganic fluoride, such as YF3 deposition, is usually formed over Y2O3 coating on the SH surface and may induce the particle while the thickness...
Graphene foam (GF), carbon fibers (CFs) and GF/CFs reinforced epoxy resin composites were fabricated and their thermal properties were investigated. Due to continuous interconnected structures of GF and avoiding the CFs aggregation in epoxy resin, GF/CFs reinforced epoxy resin demonstrates greatly higher thermal conductivity than the single GF or CFs reinforced epoxy, which could provide a strong...
In order to extract the electrical characteristics of Through-Silicon-Via (TSV) accurately, the methodologies are proposed based on three-dimensional (3D) full-wave simulations, which include both DC and high frequency measurement structures. The DC measurement uses Kelvin structure and the sources of error are discussed. The high frequency measurement structures are designed based on GSG format microwave...
Reducing leakage current and improving device's stability become important challenge for CMOS develop under the technology node of 22nm. FinFET has been attractive as the most potential device structure under 22nm. Unique FinFET device structure has the absolute advantage in restraining short channel effect. This paper presents an optical metrology technique OCD for FinFET dimension measurement. This...
Integrated passive technologies are becoming more important for both mixed signal mode as well as the key building blocks in RF products. The passive components such as capacitors drive a higher degree quality for different process schemes. We summarize the different approaches to achieve the high reliability metal-insulator-metal (MIM) capacitors. The continuous improvements of the MIM capacitor...
Now an accurate metrology of Silicon-Germanium (SiGe) thickness and Ge concentration is becoming more and more important for beyond 40nm technology. Traditional solution is normally Transmission Electron Microscope (TEM) for thickness and Second Ion Mass Spectrometry (SIMS) for Ge concentration, which is suffering from sample destruction and makes inline monitoring impossible. On the contrary, optical...
This paper aims to study the chemical mechanical polishing (CMP) of glass wafer with effect of colloidal silica (SiO2) abrasive in different CMP process parameters. Conventional glass polishing usually adopts ceria (CeO2) abrasive due to its high material removal rate (MRR). However, with the development of 3D stacking integrated circuits (3DS-IC), the demand of glass wafer for trench-glass-via (TGV)...
The growth rate of epitaxy depends primarily on parameters such as source gas deposition temperature pressure and concentration. Most microelectronic circuits fabrication that use epitaxial wafers require a lightly epitaxial layer (1014–1017 atom/cm3) on a heavily doped substrate (1019–1021 atom/cm3). The distribution of vacancies and interstitials is important for the distribution of the high surface...
As device geometry shrinks, defect reduction for yield improvement has always been the key focus in CMP process qualification. New post-CMP cleaning capability is demanded for meeting defect reduction requirement. To address the cleaning challenges in advanced nodes, innovation is needed. This paper reviews the innovation of Applied Materials CMP in post-CMP cleaning, from Megasonic cleaning for improving...
In this paper, we focus on the influence of series resistance of signal line (comoprised of the sheet resistance of graphene and the contact resistance between graphene and metal) on the radio-frequency transmission property of graphene coplanar waveguide (CPW) and put forward ways to improve it. According to our research, the large series resistance (7.2 kΩ) of signal line is the main reason for...
This paper reviews methods for reducing process exhaust pipe hazards in high-volume manufacturing. Process dry-pumps and point-of-use abatement systems can be integrated with essential safety devices and monitoring systems into a complete sub-fab vacuum and abatement solution. Such integrated sub-fab systems ensure safe exhaust pipe operation and reduce exposure of service staff to hazardous materials...
Electrically active defects in silicon-based epitaxial layers on silicon substrates have been studied by Deep-Level Transient Spectroscopy (DLTS). Several aspects have been investigated, like, the impact of the pre-epi cleaning conditions and the effect of a post-deposition anneal on the deep-level properties. It is shown that the pre-cleaning thermal budget has a strong influence on the defects at...
The FinFET technology is continuously progressing toward 14nm node on SOI and bulk substrate with good compatibility with planar CMOS and driving CMOS scaling and Moore's law for low-power/SOC and future Internet-of-Things (IOT) applications. The challenges of new FinFET technology in manufacturing at 14nm and beyond is reviewed.
Anhydride and amine epoxy systems are widely used as hardeners in underfill materials for flip chip packaging. A comparison was made between these two systems in order to evaluate the comprehensive performance of the resulting underfill. It was found that the addition of multi-size silica particles has little effect on the curing reaction of the epoxy mixture while a significant effect on increasing...
FinFET technology has been chosen for extending CMOS scaling beyond 28nm node. It can improve short channel control through a fully depleted fin, reduce random dopant fluctuation, improve mobility, lower parasitic junction capacitance and improve area efficiency. The non-SAC (self-aligned contact) local interconnection is introduced for the device connection. As the pitch shrinkage beyond immersion...
In this work, we mainly present our current development progress of high efficiency rear-emitter heterojunction solar cells using n-type silicon wafers, in three areas: a) silicon wafer surface texture treatment, b) a-Si:H(i) layer optimization for obtaining superior wafer surface passivation, and c) various TCO layer characterizations for improving the Jsc of the solar cells. We attained 20.78%,...
With gradually adopted silver alloy wire bonding in IC and LED Packaging, BSOB becomes a common practice for die stacking in IC packaging and Multi-die Serial Bonding in LED, BBOS is adopted only in LED field. This paper identify a kind of texture of silver alloy bonding wire via Electron Backscatter Diffraction (EBSD) analysis for more consistent BSOB/BBOS bonding with lower MTBA (Mean Time Between...
As dimension of middle-of-line contacts scale down, the Tungsten (W) gap-fill capability is critical, and we starts to see function failure in SRAM and logic circuit caused by W-voids. We had observed that formation of W-voids is related to the contact profile, nucleation/barrier on sidewall, and deposition methods. Furthermore, even those initially "good" W-plugs are formed, the subsequent...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.