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The smallest wirelessly powered neural implant to date is demonstrated. Power is sent over a near-field inductive link. The implant system is realized on a single CMOS ASIC which includes the on-chip coil, the harvesting circuit, and the current driver. The entire system is fabricated in a 0.13 μm CMOS process and occupies merely 180 μm × 180 μm.
The effect of different buffer layers on the RF losses of GaN-based high-mobility-transistors (HEMTs) on Si substrate has been studied. It is found that the electron inversion layer induced by the residual tensile stress in AlN buffer is responsible for a dominant loss factor. It is first time such mechanisms of the RF loss of GaN/Si is discussed. It is proven that using a thin high-low-high temperature...
A 4.6–5.35GHz transceiver with active self-interference cancelation is reported. The active cancelation circuit cancels up to 38dB of TX leakage at 10kHz offset from the RX signal. It increases the interference P1dB from −25dBm to −8dBm, and RX gain by 15dB. When the transceiver is utilized in a magnetic resonance spectroscopy system, the SNR improves by 15dB. Furthermore, in addition to the traditional...
We demonstrate a novel dual channel reflectometry technique for identification of charging processes in nanoscale Si single-electron transistors (SETs). By analyzing signals reflected from the drain and the gate of the SET we are able to pinpoint the details of single electron charging in the SET island and in the charged defects nearby.
The aim of this paper is to develop a formalism for porous Si dielectric parameter extraction for use in RF passive device design. We show that the extracted dielectric parameters using this formalism can be reliably used to simulate the experimental behavior of coplanar waveguides and inductors. In this respect we have fabricated RF devices on porous Si, extracted the dielectric parameters of the...
This paper presents a wideband 60 GHz bandpass filter fabricated on flexible 50 µm-thick PerMX polymer substrate. The implemented filter is based on conventional parallel-coupled half-wavelength resonators. Thanks to the support substrate that will be finally released, the process precision can be maintained at microfabrication level. A wideband filter has been achieved through optimization of the...
The advantages of single-ended transmission lines are their simplicity and high flexibility of interconnection. Generally, shielding with additional ground lines is essential to improving the immunity of single-ended RF/high-speed signals against noise. However, this approach is very difficult to realize for a single-ended through silicon via (TSV) in 3D ICs because of the strong dependence of characteristic...
This paper presents a silicon platform with Through-silicon vias (TSV) interconnects for Radio-Frequency applications, implemented in a via-last integration scheme. As it is aimed at transmitting a wide range of signals, it is mandatory to accurately evaluate frequency dependent loss of TSV. To achieve attractive RF performances, the silicon platform is carried out on High-Resistivity (HR) substrates...
This paper presents a silicon platform with Through-silicon vias (TSV) interconnects for Radio-Frequency applications, implemented in a via-last integration scheme. As it is aimed at transmitting a wide range of signals, it is mandatory to accurately evaluate frequency dependent loss of TSV. To achieve attractive RF performances, the silicon platform is carried out on High-Resistivity (HR) substrates...
A Silicon-on-Insulator (SOI) CMOS technology on high resistivity silicon substrates is presented for the design of cellular antenna switches. The design and measurement results for an SP9T cellular antenna switch based on this technology are presented. To the best of our knowledge, this is the first demonstration of an SP9T cellular antenna switch with adequate intermodulation and harmonic distortion...
This paper describes a highly efficient, burst mode transmitter architecture. For this operation, a broadband, Si-LDMOS overdriven class-J RF power amplifier (RFPA) is designed. By implementing the burst mode operation, an efficiency of 42% was measured when the designed amplifier was driven by a discrete multi tone (DMT) signal having 10 dB peak to average power ratio (PAPR). Moreover, an overall...
This paper presents an implementation of RF passive components on a low resistivity Si substrate with a thick ajinomoto build-up film (ABF) to reduce electromagnetic field interaction with the Si substrate. The comparison of three coplanar waveguides (CPWs) on different Si substrates has been performed to provide feasibility of ABF-layer approach. After that, a bandpass filter and baluns have been...
The introduction of deep n-well protection for bulk MOS transistors can highly enhance their DC and RF performance. It also gives the advantage of having floating-body and body-tied structures in bulk MOSFETs while eliminating the disadvantages related to the shift in performance between these two structures. We demonstrate that the high temperature, DC and RF performance of n-well isolated bulk MOSFETs...
This paper shows the first successful combination of dielectrically-transduced 200 MHz resonators with the epi-silicon encapsulation process, and demonstrates a set of important capabilities needed for the construction of CMOS-compatible RF MEMS components. The result shows the resonant frequency of 207 MHz and a quality factor of 6,400. The high fQ (1.2times1012 Hz) makes this encapsulated resonator...
SOI MOS technology has been slated as the future ULSI technology because of its advantages in terms of speed, isolation, density, yield and performance. The superior speed advantage of the SOI devices has attracted much attention in both digital and radio frequency applications. In recent years, a number of direct current analysis based on the body-tied configurations of SOI devices have been reported...
In this paper, RF characterization results of decoupling capacitors embedded in high resistivity silicon (HRS) substrate are reported. First, an innovative 3-D architecture suitable for silicon processes is decribed. Then, RF characterization results are analyzed based on capacitance values as well as ESR (estimated serial resistance) and ESL (estimated serial inductance) extraction. Results clearly...
The results show good agreement between de-embedded measurement and T- line coplanar model in both S-parameters and in Zo representation. In all cases the results of the T-line coplanar model are very close to the corresponding results of the EM solver. The RC model deviates significantly in the frequency domain from the T-line coplanar model results - both in S- parameters and in -Zo representation...
This paper presents a feasibility study on VCO using RF SiP technology, which is an RF application of stacked SiP. An off-chip inductor is implemented in a separated chip, and measured Q factor is 130. A phase noise is -119 dBc/Hz at 1 MHz offset for a 5.84-GHz carrier frequency, and frequency tuning range is 5.73 GHz-5.95 GHz. Power consumption is 1.93 mW, and 180 nm CMOS process is utilized. FOM...
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