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A large thermal-mechanical stress caused by the mismatch of thermal expansion coefficients (CTEs) between the copper and silicon substrate occurs in the active area of the stacked 3D device using the through-silicon via (TSV). Therefore, the study of TSV-induced stress is of fundamental importance in our understanding of the keep-out zone (KOZ). We investigated the metal-oxide-semiconductor field-effect...
This paper is on a vertical through silicon via (TSV) fabrication method of integrated circuit (IC) packages. The vertical TSV processes are developed by evaluating different via depth and diameter. The stress simulation and analysis of the as-formed vertical TSV structure are also conducted to predict the possible mechanical failure during the reliability test.
Due to mismatch in the coefficients of thermal expansion of silicon and copper, mechanical stresses in surrounding silicon are induced near TSV in 3D ICs. In this paper, the mobility variance of substrate material caused by TSV-induced stress is researched. Firstly the semi-analytical model for TSV-induced stress distribution is introduced. An analytical model for TSV-induced stress distribution is...
A considerable part of the energy released by electric arc during breaking of a short-circuit current is being absorbed in the moving and stationary arcing contacts. The rest of the energy is being released as thermal stresses of the nozzle and of other parts of the arcing chamber, as well as heating, dissociation and ionization of the arc extinction medium, and in losses to the nearby environment...
Due to mismatch in the coefficients of thermal expansion of silicon and copper, mechanical stresses in surrounding silicon are induced near TSV in 3D ICs. In this paper, the mobility variance of substrate material caused by TSV-induced stress is researched. Firstly the semi-analytical model for TSV-induced stress distribution is introduced. An analytical model for TSV-induced stress distribution is...
Through holes which were for electric signal communication were formed in printed circuit board. The surface of through hole was plated by thin metal and the irregularities were shaped on the free surface or on the interface due to hole-drilling process for making through holes in circuit board. Fracture of through hole was occurred by stress concentration due to its irregularity. In this study, inelastic...
This paper reviews and analyzes the behavior of a photovoltaic device (cell or module) under partial shading conditions. To do this, we implement a simulation model in an open tool (MATLAB/Simulink®) that takes into account the electrical and thermal equations of the photovoltaic device. The knowledge of the behavior of PV device under partial shading conditions is a main topic to optimize its operation...
The application of the insulated gate bipolar transistor (IGBT) in medium to high voltage, high current power systems at high switching frequency has increased the need to study the energy loss and the thermal stress of the device. Thermal and thermal stress analyses are essential to optimize the structure and material of the semiconductor module, and to prevent destruction of the devices. In this...
As the electronic industry is making its progress to miniaturize high performance, smaller and lower-priced IC packages, 3D packaging technologies are presently used to achieve these goals. Although 3D packaging technologies are vastly studied and applied to perform better performance, low power consumption and smaller packaging size of IC packages, thermo-mechanical problems occur as well due to...
Rapid heating and cooling are commonly encountered events in integrated circuit processing, which produce thermal shocks and consequent thermal stresses in wafers. The present paper studies the heat transfer in sapphire wafers during a thermal shock as well as the dependence of the wafer temperature on various process parameters. A three-dimensional finite-element model of a single sapphire wafer...
A mechanical stress analysis of the LDD-MOSFET structure is presented. It includes the cumulative effects from the oxidation, the thermal cycles and the intrinsic stresses, and uses a non-linear viscoelastic model. A calibration of the rheological properties is also proposed for APCVD doped oxides.
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