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Software-based self-testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents a tool for automated Software-Based Self-Test program generation. The tool is based on the previously published methodology of using High-Level Decision Diagrams (HLDD) for modeling microprocessors and faults. The tool generates from the Instruction Set Architecture of the processor...
A new high-level fault model and test generation method for software-based self-test in microprocessors (MP) is proposed and investigated. The model is derived directly from the instruction set of the given MP. A deterministic high-level method and algorithm for test data generation based on this fault model are proposed for the control part of MP. For the data path of MP, pseudo-exhaustive test generation...
The saturation of the IJTAG concept and its approval as the IEEE 1687 standard in 2014 has generated a wave of research activities and created demand for a set of appropriate and challenging benchmarks. This paper presents such a set developed by an industrial and academic consortium and constructed in a way that facilitates objective comparison of experimental results across research groups as well...
Software-Based Self-Testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents an approach for automatic SBST program generation, based on the methodology of using High-Level Decision Diagrams (HLDD) for modeling microprocessors and faults. The novelty of this approach is that Instruction Set Architecture (ISA) of the processor is the only needed input data...
A new method for high level fault modeling to improve the test generation for the control parts of digital systems was proposed. We developed a new high-level functional fault model based on High-Level Decision Diagrams (HLDD). It allows uniform handling of possible defects in different control functions related to instruction decoding, data addressing, and data manipulation. It was shown how the...
The paper presents a novel approach to high-level fault modeling and test generation for microprocessors using High-Level Decision Diagrams (HLDD). A general frame-work and novel techniques for automated software-based self-test program generation are discussed. On this basis new previously not published test quality improvement capabilities of the approach are high-lighted and explained. Based on...
We propose a laboratory research and student training oriented framework consisting of Test Evaluation Automated Means (TEAM) as a set of tools for evaluating the quality of test programs for microprocessors and systems. TEAM enables students to learn and analyze the dependability issues of microprocessor systems, to create their own designs and develop test programs, to analyze the quality of testing,...
Software-based self-testing (SBST) is a well known non-intrusive method for processor testing. Its applications have been intensively studied by the research community for the last decades. Generally, the inextinguishable attention to this method is mainly caused by continuous growth of complexity of modern processors that poses new research challenges. One of these challenges is automated generation...
With the continuous growth of capacity of non-volatile memories (NVM) in-system programming (ISP) has become the most time-consuming step in post-assembly phase of board manufacturing. This paper presents a method to assess ISP solutions for on-chip and on-board NVMs. The major contribution of the approach is the formal basis for comparison of state-of-the-art ISP solutions. The effective comparison...
While system level test was a topic of extremely high interest during the last decades, the cost of the test program development was continuously growing. The restricted capabilities of Boundary Scan (BS) with respect of such modern challenges as dynamic (timing-accurate), at-speed and high speed testing as well as in-system diagnosis of functional failures create considerable troubles for test engineers...
Many contemporary electronic systems are based on System-on-Chips (SoC) such as micro-controllers or signal processors that communicate with many peripheral devices on the system board and beyond. While, SoC test was a topic of extremely high interest during the last decade, the test beyond SoCs didn't get much attention after introduction of Boundary Scan (BS) 30 years ago. It is not a surprise that...
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