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This paper presents for the first time an experimental analysis of germanium pMOSFETs operating in conventional, dynamic threshold voltage (DT, where VBS = VGS) and enhanced dynamic threshold voltage (eDT, where VBS=k*VGS) modes. In addition, there are two different HfO2/Al2O3 gate stack thicknesses under evaluation. The subthreshold swing (SS) improves 60% in eDT (k = 2) mode compared to the conventional...
The oxide trap density profile in DRAM peripheral nMOSFETs with Mg cap and different thermal budgets for in-diffusion of the metal ions has been investigated by low-frequency noise. It is shown that close to the SiO2/HfO2 interface a peak in the trap density is found, which disappears under a high thermal budget. No impact of Mg on the bulk oxide trap density in the HfO2 is observed.
In this work an ultrafast characterization technique has been developed with the aim of studying the NBTI degradation in pMOS transistors by acquiring the threshold voltage (Vth) shift in very short relaxation times after the electrical stress removal. The NBTI degradation has been studied as a function of the stress and relaxation time. The observed BTI relaxation has been explained in the framework...
The total-dose response of Ge p-MOSFETs and p+-n junction diodes is reported for devices fabricated with several process variations. Radiation-induced reduction of the on-off current ratio increases with halo-doping density. Increasing the number of Si monolayers at the substrate/dielectric interface reduces total-dose sensitivity for p-MOSFETs. Reduced mobility degradation is observed after irradiation...
This paper discusses the capture kinetics of a particular class of Random Telegraph Signals (RTS's) occurring in small area Si MOSFETs. Such RTS's occur both in n- and p-channel devices and show a strong dependence of the capture time constant on the drain current. This dependence is stronger than predicted by standard Shockley-Read-Hall theory and can be interpreted by assuming tunneling of the carriers...
The operation of inverters, fabricated in a 1 ??m partially depleted SOI CMOS technology is investigated from room temperature down to liquid helium. It is demonstrated that the transfer characteristics suffer from the floating-body anomalies, like the kink and the breakdown/latch behaviour. Additionally, at 4.2 K, hysteresis, which is related to the cryogenic (freeze-out) behaviour of the n-MOSFETs...
The low-frequency (LF) noise behaviour of Silicon-on-Insulator MOSFETs fabricated in different SOI CMOS technologies is reported. It is shown that the kink-related excess LF noise, typical for the floating operation of partially depleted transistors can be eliminated by a proper choice of technology, i.e., either by using a fully depleted technology, or so-called dual-gate (gate-all-around) structures...
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