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Integrated optical Mach-Zehnder interferometers (MZI) may be used as high-sensitivity sensors by taking advantage of the interaction of the waveguide evanescent field with liquids or gases surrounding the sensor. We present here the design and simulation of polymer-based MZIs fabricated using printing technologies. Based on simulations of an integrated MZI system with regard to variations of waveguide...
In order to improve the performance of HfOx-based resistive random access memory (RRAM), a VOx buffer layer was introduced in the Cu/HfOx interface of Cu/HfOx/TiN RRAM cell in this paper. Their resistive switching characteristics (such as I–V characteristics, endurance and retention) and the switching mechanism were investigated. Results show that the VOx buffer layer acts as a barrier which avoids...
In this work, we discuss the state-of-the-art of GaN-on-diamond wafer technology at Element Six. We report our recent demonstration of 100mm (4″) GaN-on-diamond HEMT epitaxial wafers—with the highest thermal conductivity of diamond (>1500 W/mK) yet. The wafers exhibit <20µm bow mounted on-carrier, sheet resistivity of <450 Ohms/sq, and CV specs that are in-line with industry expectations.
Semiconductor equipment usually can be divided into five sub-system modules, (a) heating system, (b) exhausting system, (c) injecting system, (d) power control and (e) vacuum chamber. Metal organic chemical vapor deposition (MOCVD) process is the key process to deposit epitaxy thin film, and the uniformity is determined by the distribution of susceptor temperature. This research focuses on the development...
Reciprocating surface grinding is one of state-of-the-art machining processes to flatten semiconductor wafers to obtain a better surface roughness and grinding marks uniformity. In this paper, a kinematic model is developed to study the grinding marks pattern resulted from the reciprocating surface grinding. The model is then utilized to simulate the grinding marks and compared with rotary surface...
The hafnium oxide (HfOx)-based Resistive Random Access Memory (RRAM) array devices are fabricated by chemical mechanical planarization (CMP) process, which is based on the optimization of slurry and exploration on mechanism of HfOx-CMP. The performance of switching properties post-polishing is investigated from device to device (WIW) as well as compared with those without planarization. The results...
When CMOS technologies entered nanometer scales, FinFET has become one of the most promising devices because of its superior electrical characteristics. To accommodate the 3D topography, gate etch needs soft landing on the top of Fin while removing the extra poly-si around Fin. Its over etch is more aggressive than conventional planar gate to avoid poly-si residue. Fin loss should be well controlled...
The paper describes verification techniques for certain layout design rules like deep n-well biasing, well implant and parasitic effects for mixed signal SOCs with multiple power domains. The technique analyzes the netlist and layout simultaneously and is superior to LVS methodology. Traditional LVS methodology is not effective because either some of these checks cannot be performed without putting...
Linear voltage regulators are widely used in electronic systems for low noise and precise output voltage. This paper presents an output-capacitorless linear voltage regulator with 5.5V∼40V input voltage, 5V output voltage and 100mA load current. The damping-factor-control (DFC) frequency compensation has effectively enhanced the loop stability. A high to low circuit is presented to supply power for...
As technology scales into the deep submicron regime, on chip variation (OCV) has become a dominant factor which influences the performance and yield of the circuits. Considering OCV analysis in static timing analysis (STA) tools is therefore one of the most crucial issues in LSI designs nowadays. Advanced OCV (AOCV) is a widely deployed technique in industry to account for OCV effects at smaller geometries...
This paper presents the design of a low power and a highly linear folded down-conversion mixer, for wideband applications, implemented in a 65nm CMOS process. Post-layout simulation results are presented. The proposed multiple-gated transistor (MGTR) based mixer achieves a linearity enhancement of 12.68 dB when compared to a conventional folded single balanced mixer operating at an input radio frequency...
A novel Hall dynamic offset cancellation circuit based on four-phase spinning current technique is introduced. The offset cancellation circuit of Hall sensor applies a novel configuration including four-phase spinning current modulator, instrumentation amplifier, correlated double sampling demodulator and adder, which effectively eliminate the offset and 1/f noise, and linearly amplify the Hall signal...
A new bulk-driven sense-amplifier based flip-flop (BDSAFF) is presented in this paper. Based on bulk-driven technique, this new flip-flop can reduce power dissipation by connecting control signals from the bulk terminal so as to control the substrate bias and generate current difference. The adopted pseudo-PMOS dynamic technology in the RS latch output stage can greatly reduce delay and improve driving...
Uniformity impact of metal and via on upstream Electromigration (EM) was investigated in Cu interconnect based on 40nm technology node. It is found that EM time-to-failure (TTF) log-normal main distribution can be improved by better metal uniformity. It is also observed that EM performance can be greatly enhanced by improving via and metal uniformity with NFC pull back recipe.
Advances in wide band-gap semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN) offer many high temperature electronic applications. However, current packaging technologies hinder taking full advantages of the high temperature capabilities offered by these devices. This paper discusses the material and fabrication issues and technologies for high temperature packaging.
The development of a system that evaluates optical parameters of light emitting diodes (LED) in a wafer is presented, equipped with an integrating sphere on a three-dimensional precision platform. The influence of integrating sphere's (IS) position and height relative to LED chip on measuring accuracy is analyzed quantitatively. It was found that luminous flux variation was less than 0.5% within deviation...
As the design rule shrinks, detecting smaller key defects of interest is becoming more challenging for wafer inspection tools. A novel Knight™ Design Based Inspection (KDBI™) system was implemented to extend Applied Materials' inspection tools' capability. Using design data, the KDBI™ Recipe Editor helps to expedite the recipe creation process. A CAD database makes it easy to find the array areas...
Package footprint reduction, environmental protection law compliance and manufacturing cost reduction constrains are moving the semiconductor industry toward the mass adoption of Quad Flat Non-leaded packages (QFN), Pre Plated Frames (PPF), and Cu based bonding wires. On the one hand, these chip packaging technologies enable compliance with these objectives, yet on the other hand they present new...
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