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This paper details a co-design and modelling methodology to optimise the flip-chip assembly parameters so that the overall package and system meets performance and reliability specifications for LED lighting applications. A co-design methodology is employed between device level modelling and package level modelling in order enhance the flow of information. As part of this methodology, coupled electrical,...
This paper presents a novel chip on board assembly design for an integrated power switch, based on high power density 800V silicon lateral insulated gate bipolar transistor (Si LIGBT) technology. LIGBTs offer much higher current densities (5-lOX), significantly lower leakage currents, lower parasitic device capacitances and gate charge compared to conventional vertical MOSFETs commonly used in LED...
We report here a new physical phenomenon related to contact etch depth in High Voltage Lateral IGBTs (LIGBTs) and propose a design technique to increase yield of LIGBTs in high volume production. We prove for the first time that the contact geometry and placement have direct effect on Collector injection efficiency in LIGBTs. An improved design for 800V LIGBTs obtained by optimising the layout of...
This paper presents a critical comparison of static and switching performance of commercially available 1.2 kV SiC BJTs, MOSFETs and JFETs with 1.2 kV Si IGBTs. The experiments conducted are mainly focussed on investigating the temperature dependence of device performance. As an emerging commercial device, special emphasis is placed on SiC BJTs. The experimental data indicate that the SiC BJTs have...
An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially...
A self-isolating, lateral IGBT device with high voltage blocking capability (>700 V), high on-state current density (150 A/cm2 at Vds=4 V) and very fast turn-off (< 50 ns), realized in membrane on bulk Si technology is reported here. The device has been manufactured using a standard 5 V, 0.35 mum bulk CMOS process on 8" wafers with the addition of two masks: i) n-drift for the HV blocking...
A step change in performance and reliability of thick SOI membrane devices compared to earlier generation of devices on ultra-thin SOI membranes is reported in here. The membrane concept first reported offered a landmark improvement in the trade-off between switching losses and breakdown capability (in excess of 700V) but its current capability was limited by the thickness of the silicon membrane...
Back-side etching of the entire silicon substrate under part of the drift region of a SOI power device was first proposed by Udrea and Amararunga (2004) and experimentally reported by Udrea et al. (2005). This technology concept enables high voltage devices to be embedded in a thin silicon/oxide membrane resulting in very significant improvements in breakdown ability and switching speed. This paper...
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