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This paper reports the reactive i on etching (RIE) characteristics of partially-cured benzocyclobutene (BCB) in sulrur-hexafluoride/oxygen (S F6/O2) plasmas. The etching rate and etch anisotropy are mainly dependent on RF power, chamber pressure, and SF6 concentration. The processing parameters are investigated ranging from 50 to 200W, 22.5 to 270 mTorr, and 0% to 80%, respectively. According to the...
Through silicon via (TSV) technology has been widely applied in CMOS image sensors (CIS). This paper reports the wetting behavior of polymer liquid in the TSV insulation process by spin coating. The O2 plasma treatment was used to increase the hydrophilicity of the substrate surface in order to reduce the adhesion between the polymer liquid and the via sidewall. This surface treatment was to ensure...
This paper presents a novel spray coating process for the forming of sidewall insulation of through silicon via (TSV) which was a challenging process in CMOS image sensor (CIS) packaging. In conventional way, silicon oxide by plasma enhanced chemical vapor deposition (PECVD) is chosen as insulation material. In this paper, one kind of phenolic aldehyde polymer is deposited on the sidewall of though...
Commercialization of flexible electronics requires reliable, high performance, ultra-compact and low power devices. To achieve them, we fabricate traditional electronics on bulk mono-crystalline silicon (100) and transform the top portion into an ultra-thin flexible silicon fabric with pre-fabricated devices, preserving ultra-large-scale-integration density and same device performance. This can be...
Dual polarisation biosensing is a novel optical technique that focuses on retrieving structural information from a bound or adsorbed layer of molecules, by using a silicon-on-insulator (SOI) microring. Both density and thickness of the layer can be monitored simultaneously. Due to a self-calibrating protocol that is quickly performed at the start of every experiment, a high accuracy can be obtained...
Novel technology enablers for high-performance three-dimensional (3D) system integration are demonstrated in this paper: (a) A thick silicon interposer with 65 µm diameter and 370 µm tall low-loss polymer-embedded vias on a 150 µm pitch is fabricated and characterized demonstrating a 78% reduction in insertion loss compared to similar-sized conventional TSVs at 50 GHz; (b) Two dice with embedded microfluidic...
This paper presents the first demonstration of a high-throughput die-to-panel assembly technology to form Cu interconnections without solder at temperatures below 200°C. This interconnection technology, previously established with individual single-chip packages on both organic and glass substrates, at pitches down to 30μm, is brought up to a significant manufacturable level by two major innovations:...
This paper presents the first demonstration of an ultra-thin glass BGA package that is assembled on to mother board with standard SMT technology. Such a package has many new advances that include ultra-thin glass, high speed through via hole formation and copper metallization, double-side RDL wiring with a dvanced 3 micron ground rules, and Cu-SnAg microbump assembly of a 10mm silicon test die. Glass,...
A three-layer-stacked wafer with CMOS devices was fabricated by using hybrid wafer bonding and backside-via-last TSV (7-µm diameter/25-µm length) processes. Successful fabrication of this wafer confirmed that copper/polymer hybrid wafer bonding brings seamless copper bonding in face-to-face (F2F) and back-to-face (B2F) configurations. The low capacitance of the TSVs results in the highest level of...
Through silicon via (TSV) technology has been widely applied in CMOS image sensors (CIS). This paper reports the wetting behavior of polymer liquid in the TSV insulation process by spin coating. The O2 plasma treatment was used to increase the hydrophilicity of the substrate surface in order to reduce the adhesion between the polymer liquid and the via sidewall. This surface treatment was to ensure...
This paper presents a novel spray coating process for the forming of sidewall insulation of through silicon via (TSV) which was a challenging process in CMOS image sensor (CIS) packaging. In conventional way, silicon oxide by plasma enhanced chemical vapor deposition (PECVD) is chosen as insulation material. In this paper, one kind of phenolic aldehyde polymer is deposited on the sidewall of though...
This paper reports the reactive i on etching (RIE) characteristics of partially-cured benzocyclobutene (BCB) in sulrur-hexafluoride/oxygen (S F6/O2) plasmas. The etching rate and etch anisotropy are mainly dependent on RF power, chamber pressure, and SF6 concentration. The processing parameters are investigated ranging from 50 to 200W, 22.5 to 270 mTorr, and 0% to 80%, respectively. According to the...
Thin film polymers play an essential role in system integration. The mechanical properties of the polymers are crucial for 3-D-Integration and advanced WLP because with the thinning of the silicon wafers, i.e. chips to less than 150 μm, the influence of the polymer layers gets an increasing impact on the mechanical stability of the electronic device. Next generation polymers have entered the market...
As electronic product becomes smaller and lighter with an increasing number of function↚ the demand for high density and high integration becomes stronger.! Interposers for system in package will became more and more important for advanced electronic systems. Silicon interposers with through silicon vias (TSV) and back end of line (BEOL) wirring offer compelling benefits for 2.5D and 3D system integration;!...
This paper provides a roller type nano-pattern transfer process, which is based on UV nanoimprint lithography, for nano-patterning on both rigid and flexible substrates. By using UV-curable polymer resist, room temperature and low pressure process, which is possible to apply to flexible films, is introduced. PDMS and PVA soft molds that can have conformal contact with large area non-flat substrate...
Polymer liners have provided potentially attractive solutions over conventional silicon dioxide (SiO2) in singlewalled carbon nanotube (SWCNT) bundle based through silicon vias (TSVs). Using SiO2 and different polymer liners (such as BCB, PPC and polyimide), this paper analyzes the delay with and without crosstalk for different TSV heights and radius. It is observed that the crosstalk coupling is...
Polymer low-k materials have been considered in literature to meet the requirements of lowering the dielectric constant of the dielectric layer to decrease the problem of signal delay, lower power consumption, and reduce cross-talk between the neighboring paths, as well as, lower the fabrication temperature budget. In this paper, the feasibility of using Parylene-HT as a low-temperature deposition...
Porous polymers are gaining increased interest in several areas due to their large surface area and unique physiochemical properties. Porous polymers are conventionally manufactured using specific processes related to the chemical structure of each polymer. In this paper, we report a generic fabrication process that can be applied to all liquid polymers to texture their outer surfaces with a desired...
Cu/polymer hybrid surface was treated by Ar plasma and Ar fast atom bombardment to confirm the feasibility of Cu/polymer hybrid bonding by using surface activated bonding method. Uncross-linked novolac resin mixed with imidazole as the curing agent was used as the polymer adhesive. We used X-ray photoelectron spectroscopy to study the effects of Ar plasma and Ar FAB treatments on the Cu/polymer surface...
The methodology suggested in this research provides the great possibility of creating nanostructures composed of various materials, such as soft polymer, hard polymer, and metal, as well as Si. Such nanostructures are required for a vast range of optical and display devices, photonic components, physical devices, energy devices including electrodes of secondary batteries, fuel cells, solar cells,...
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