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Optical interconnects at progressively shorter distances and higher communications densities demand novel optics and very low operating energies. Optoelectronics with femtojoule or lower energies and compact custom and self-designing optics may enable the lower energy per operation and higher bandwidth density required for continued scaling of information processing, with significant potential impact...
In this paper, optimization of 1X BEOL wiring level of 7 nm node is presented. We focus on the interconnect delay from 10 nm node to 7 nm node using a single stage driver circuit. The device delay is calculated based on the characteristics of the 10 nm driver circuit. Then the result is compared with a shrunk version of the circuit at the 7 nm dimension. Therefore, the impact of the BEOL on the circuit...
Moore's law has been the foundation for increasing complexity and density of semiconductor chips and has prevailed over the years through many transitions in silicon (Si) nodes. The simultaneous scaling of density, cost and performance which is made possible by fan-out wafer level packaging may be viewed as the manifestation of Moore's law in the packaging domain. Recent developments in Fan-out Wafer...
This paper reports comprehensive transient electrostatic discharge (ESD) characterization of backend interconnects in a foundry 28nm CMOS. Testing results reveal details on metal current handling capability and on-chip ESD protection ability. ESD design guidelines for interconnects are provided for chip-level ESD protection circuit designs in 28nm CMOS.
We study the impact of material property variations in through-silicon-via (TSV) and its surrounding structures on the reliability and performance of 3D ICs. We focus on coefficient of thermal expansion (CTE) and Young's modulus variations for TSV, barrier, and liner materials. Our toolset efficiently handles the complexity of modeling and analysis of individual TSVs as well as full-chip 3D IC designs...
The growth kinetics of Al-Cu intermetallic compounds (IMC) have been investigated on thin film couples and bonded samples in the range 150°C to 250°C using XRD, SEM/EDX and in-situ interface resistance monitoring. Individual diffusion constants Do and activation energies Ea (1.01eV, 0.97eV, 1.23eV, 1.28eV) have been obtained from thin film couples for the main three IMC phases Al4Cu9, AlCu and Al2...
This paper reports a novel tri-axis microelectro-mechanical systems (MEMS) capacitive sensor utilizing multi-layer electroplated gold. The high density of gold has enabled us to minimize the Brownian noise and hence to reduce the footprint of the proof mass. To optimize the flexibility of the mechanical springs for tri-axis motions, we have newly developed multi-layered metal spring structures. All...
In this paper the void formation during electromigration is characterized with the innovative Local Sense Structure (LSS) and with a standard single-via (SSV) electromigration test. LSS allows the measurement of small resistance change before final void formation, that have allowed to define a time of nucleation of the void (Tn). Furthermore, the classic structure has been used to evaluate the time...
A new family of oxygen and fluorine free Nickel (Ni) precursors, which are based on allyl and alkylpyrrolylimine ligands [Ni(allyl)(PCAI-R)], has been developed and evaluated for a Ni metal film with thermal and plasma enhanced ALD using H2/NH3 as a reducing agent. From Ni(allyl)(PCAI-iPr), pure Ni film with very low resistivity (5.3 µO·cm) was obtained at 400 °C by PEALD, which is close to the resistivity...
Back-end-of line (BEOL) interconnect scaling has led to the implementation of self-aligned via (SAV) schemes for ≤ 90 nm BEOL pitches [1]. In one implementation of this scheme, a TiN metal hardmask (MHM) is used for the trench pattern definition while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work,...
It has been reported that the crystal phase of Ta on TaN barrier depends on the underlying TaN thickness. However the investigation of TaN film thickness dependent about via resistance has not been carried out enough. In this study, we have investigated the influences of crystal phase of Ta barrier at the via bottom on via resistance and reliability performances. We found that the via resistance with...
Plasma-enhanced CVD (PECVD) flowable low-k process compatible with the conventional UV cure process has been developed. Reduction of shrinkage by the UV cure was critical to ensure gap-filling capability with planarity, which was achieved by deposition condition tuning to reduce hydro-carbon constituent in the film and enhancement of dehydration by applying post-deposition treatment. Complete filling...
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