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In this paper, the compensative structure assisted the convex and concave corner structures etch in inductively coupled plasma reactive ion etch (ICP-RIE) have been studied. In anisotropic silicon etching, under the Bosch patent, sequentially alternating etch and passivation cycles can easily achieve high aspect ratio silicon structures. But, the feature size of the convex and concave corner structures...
When CMOS technologies entered nanometer scales, FinFET has become one of the most promising devices because of its superior electrical characteristics. To accommodate the 3D topography, gate etch needs soft landing on the top of Fin while removing the extra poly-si around Fin. Its over etch is more aggressive than conventional planar gate to avoid poly-si residue. Fin loss should be well controlled...
To obtain a defect free and dislocation free during SiGe deposition is the key for improving hole carrier mobility for 40 nm technology node and beyond. This paper presents a methodology to eliminate SiGe dislocation. The key step is to introduce SF6 during Si trench surface treatment after Si trench main etch.
Double Patterning (DP) technique is developed and applied to 45nm technology node and beyond by improving litho equipment and process windows. In addition in the 14/16nm node, the planar device is replaced by 3D FINFET architecture for device performance improvement; the SADP (self-align double patterning) technique is developed for FIN formation with focus on the smaller CD and LER (line edge roughness)...
A three-step model used for modeling and simulation of black silicon formation in DRIE (Deep Reactive Ion Etching) process is presented. It divides the plasma etching system into plasma layer, sheath layer and sample surface layer. At the same time, it combines quantum mechanics, sheath dynamics and diffusion theory together based on plasma environment to predict the probability distribution of etching...
TSV (Thru Silicon Via) application for 2.5D silicon interposers and 3D stacked devices is expected to realize a next-generation semiconductor device with high packaging density, power saving, and high-speed signal transmission, etc. Recently, discussions on long-term reliability of TSV has been triggered, the establishment of TSV integration technologies contribute to reliability is strongly requested...
TEOS and/or TEOS/HFE plasma polymerized thin films, exposed or non-exposed to ultraviolet (UVC) radiation, were obtained on gold electrodes and tested for electrochemical measurements. All films presented good performance on electrochemical measurements. The electronic signal does not change significantly after 24h on physiologic serum but thin TEOS films allow ion permeation. Thus, these films are...
An optical steerable terahertz zone plate is achieved utilizing the localized distribution of the transient electron plasma on a silicon wafer. Its focusing and imaging performances are experimentally demonstrated. The research prompts the development of steerable optical imaging elements.
This paper reports the reactive i on etching (RIE) characteristics of partially-cured benzocyclobutene (BCB) in sulrur-hexafluoride/oxygen (S F6/O2) plasmas. The etching rate and etch anisotropy are mainly dependent on RF power, chamber pressure, and SF6 concentration. The processing parameters are investigated ranging from 50 to 200W, 22.5 to 270 mTorr, and 0% to 80%, respectively. According to the...
Through silicon via (TSV) technology has been widely applied in CMOS image sensors (CIS). This paper reports the wetting behavior of polymer liquid in the TSV insulation process by spin coating. The O2 plasma treatment was used to increase the hydrophilicity of the substrate surface in order to reduce the adhesion between the polymer liquid and the via sidewall. This surface treatment was to ensure...
This study describes a simple and efficient method for depositing of highly ordered and aligned Zinc Oxide (ZnO) film as the semiconducting channel layer for use in a transparent thin-film transistor (TFT) on a silicon and flexible polyimide (PI) substrate. The effect of an oxygen (O2) plasma power of 18 W followed by low temperature (∼approximately 150 °C) annealing on a hot plate was evaluated,...
We demonstrate the simultaneous growth of multiple optically functional crystalline structures through a complex implantation and diffusion process. This includes ZnTe, ZnO and as-yet undefined silica crystallites doped with Er3+ or Tm3+ which are each characterized optically and structurally.
In this work we show the impact of surface cleaning on the dynamic characteristics of Au-free AlGaN/GaN Gated Edge Termination Schottky Barrier Diodes (GET-SBDs). It is demonstrated that the current dispersion (measured in pulsed regime) can be reduced by introducing a N2 plasma cleaning step in the anode metal deposition chamber. Moreover, diodes treated with N2 plasma show lower current drop after...
Microfabricated in-plane bulk acoustic resonators can be configured as gravimetric sensors wherein the mass of surface-bound species is transduced as a shift in the resonant frequency. Using this principle, we examine the adsorption of spherical polystyrene latex particles on the resonator surface by drying particulate laden droplets. Distribution of particles on the surface is governed by the coffee-ring...
Spectroscopic ellipsometry was used to optimize p-layer deposition for silicon-based thin film solar cells. It is found that the p layer with a double-layer structure with increased boron-doping gives the highest open-circuit voltage (Voc) of 1.03 V for hydrogenated amorphous silicon (a-Si:H) solar cells. Together with atomic force microscopy and optical transmittance measurements, the cell performance...
An adequate sequential etching though dielectrics, silicon and permanent adhesive material was successfully developed for the damascene interconnects in the face-to-back bumpless TSV Wafer on Wafer (WOW) processes. The induced bowing taken place at the etching of permanent adhesive was optimized and no void Cu metallization was achieved. According to those TSV technology, the upper and lower stacked...
With the shrink of TSV diameter, smoothness of side wall and taper angle control become more and more important. We have developed scallop free etching by direct etching method. Direct etching method is continuous, not cyclical etching and deposition. Scallop does not occur in principle. Double ICP antenna newly developed has good controllability of side wall taper angle.
This paper describes the complementary study of plasma-emission wavelength by optical emission spectroscopy (OES) and the experimental results collected from an x-ray photoelectron spectroscopy (XPS) directly over the etched wafer. We have monitored two kinds of etch processes, where the chemistry used was based on CF4, He, CH2F2, and HBr, O2. Additionally, the study was carried out across a typical...
Quantum dot structures, where electrons are confined three-dimensionally in the below 10 nm scale, show characteristics quite different from conventional bulk structures. Recent progress in the fabrication technology of silicon nanostructures has made possible observations of novel electrical and optical properties of silicon quantum dots, such as single electron tunneling, ballistic transport, visible...
Toppling during clean process is a general structure issue when we scale down critical dimension (CD)/increase aspect ratio (AR) and density of the nano structures. In this paper, we demonstrated a novel process with CH4 PLAD (plasma doping) conformal process to eliminate the toppling issue. A uniform C deposition layer from CH4 PLAD process wrapped the whole structure on the top/bottom/sidewall and...
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