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The dependence of the avalanche breakdown voltage on vertically linear doping gradient of the drift region based on Silicon-On-Insulator (SOI) lateral diffuse metal oxide semiconductor (LDMOS) is studied. Vertically linear doping profile (VD) of the LDMOS structure is exhibited to obviously improve safe of operation area (SOA) from the conventional uniform and variable linear doping structure. From...
Wire array or nanowire based silicon solar cells based upon radial p-n junctions have been investigated over the past few years for enhanced light trapping, as well as for being able to offer radial junctions that are in close proximity to photogenerated carriers. To date, however, silicon wire array cells have not been able to demonstrate efficiencies higher than their planar controls. We have studied...
Recently, Ge has been intensively studied as a light emission material that emits at ~1.5 μm, as it has been theoretically proven to be a promising candidate to realize Si-based light source for on-chip and chip-to-chip communications. In this paper, photoluminescence (PL) is reported from heavily phosphorus (P)-implanted epitaxial Ge thin films on Si. Sheet resistance has been measured to characterize...
Ge/Si core/shell gate-all-round nanowire pMOSFET integrated with HfO2/TaN gate stack is demonstrated using fully CMOS compatible process. Devices with 100 nm gate length achieved high ION of ~946 ??A/??m at VG - VT = -0.7 V and VDS = -1 V and on/off ratio of 104 with decent subthreshold behavior. Significant improvement in hole mobility and ballistic efficiency is demonstrated as a result of core/shell...
DSRDs are fast HV opening switching devices. Traditionally, these deep junction devices are fabricated on silicon wafers by deep diffusion. We present DSRD results based on silicon epitaxial layers with as-grown junctions. Static measurements showed a rectifying behavior with leakage currents proportional to device dimension. Pulsed power measurements showed that the switching rate was dependant on...
Formation of ultra-shallow p+/n junction has been performed with the combination of low-temperature solid phase epitaxy and non-melt laser annealing. The former is aimed for improving crystallinity of junction region and the latter for activating implanted B ions. After pre-amorphization implantation of Ge, B ion implantation was performed at energy of 0.2 keV with a dose of 1.2 times 1015/cm2. With...
A scalable, self-aligned In0.53Ga0.47As MOSFET process was developed and enhancement mode device operation was demonstrated. The 0.7 mum Lg device shows a maximum drive current of 0.14 mA/mum at Vgs=4.0 V and Vds=2.5 V. The devices have almost an order of magnitude larger drive current than our previously reported MOSFETs. The channel layer was 5 nm thick InGaAs with InAlAs bottom barrier for vertical...
We have successfully fabricated uniaxially strained SOI FinFETs with high electron mobility and low parasitic resistance. The electron mobility on (110) sidewall surfaces was found to surpass the (100) universal mobility by the subband engineering through uniaxial tensile strain along <110>. Thanks to this high electron mobility enhancement and the relatively low parasitic resistance, high I...
Ultra Thin Body Si-On-ONO (UTB SOONO) transistors with ultra thin spacer are successfully demonstrated and evaluated. They have shown increased driving current more than 30% compared with conventional UTB SOONO transistors with thick spacer due to reduced source/drain resistance without short channel effect degradation by using thin spacer. In this paper, it is shown that thin spacer technology is...
Novel 3D stacked gate-all-around multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32 nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low IOFF (< 20 pA/mum) and high ION (> 2.2 mA/mum) were demonstrated. Moreover, those transistors do not suffer...
The Epitaxy Wrap-through (EpiWT) cell concept is introduced. It combines the benefits of rear-side contacting with the low-cost potential of epitaxial crystalline silicon thin-film technology. Its advantage over the standard EWT cell upon which it is based is the simplified rear structuring due to the inactive substrate. This paper focuses on the development of the key process: the epitaxial deposition...
In this study, we fabricated in-plane thermoelectric micro-generators (4 mm times 4 mm) based on bismuth telluride thin films by using flash evaporation method. The thermoelectric properties of as-grown thin films are lower than those of bulk materials. Therefore the as-grown thin films were annealed in hydrogen at atmospheric pressure for 1 hour in a temperature range of 200 degC. to 400degC. By...
A study is made of fluorine implantation into polysilicon for application in npn polysilicon emitter bipolar transistors. Polysilicon sheet resistance measurements are used to monitor the effect of the fluorine on the epitaxial realignment of the polysilicon, and this is correlated with device electrical results. It is shown that the fluorine causes epitaxial realignment of the polysilicon to occur...
A silicon bipolar technology, which uses Selective Epitaxial Growth (SEG) for the active base and collector regions is described. Key features of the SEG transistor configuration are a quasi self-aligned base/collector structure and an epitaxial base process, which has been integrated into a self-aligned double-poly emitter/base configuration. The high speed capability of the SEG transistor concept...
Design issues for a high-performance bipolar technology with Si or SiGe epitaxial base are discussed. Narrow and shallow polysilicon emitter formation and extrinsic base design for low base resistance are investigated using selective epitaxy emitter window (SEEW) transistors. In spite of a close proximity of the extrinsic base diffusion to the intrinsic device a cut-off frequency (fT) up to 50 GHz...
A study is made of epitaxial regrowth of polysilicon in double-diffused polysilicon emitter bipolar transistors. TEM and RBS are used to assess the extent of the epitaxial regrowth, and a simple sheet resistance measurement is used to give a sensitive measure of the amount of regrowth. The temperature of the RTA used for the second diffusion is varied between 950 and 1150??C, with epitaxial regrowth...
Different types of bipolar transistor emitters are described. Epitaxial emitters can be achieved by solid phase epitaxial regrowth of polysilicon (at T ≫ 850??C) and recently by glow discharge deposition at T = 250??C and recrystallization (at T = 700??C). Wide band gap emitters and narrow bandgap bases result in very high emitter efficiency which has to be traded-off with emitter and base series...
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