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We have performed linewidth measurements on low threshold planar gain-guided vertical cavity laser diodes. Mode structure and linewidth are determined as a function of driving current for various laser structures. The linewidth shows a linear increase with inverse modal output power at a characteristic slope of about 6 MHz??mW. A mode competition effect can be made responsible for the increase of...
We present a novel surface emitting laser diode beam steering device based on the excitation and emission of surface modes. This new device is a wavelength tunable GaAs/AlGaAs laser diode, which is modified to allow a coupling of the laser mode to a transverse electric polarized surface mode. A steering of the surface emitted farfield pattem is achieved by a variation of the emission wavelength. By...
We have performed a study of differently shaped InGaAs/InGaAsP quantum wells (Lz = 10 nm) with a view to finding the structure which produces the largest quantum confined Stark shift. We find both theoretically and experimentally that our greatest shift is produced by the structure composed of stepped quantum wells.
DMILL technology is being developped for very rad-hard analog-digital applications, such as space and military circuits or as electronics for the future generation of high energy collider (LHC, CERN, Geneva) [3]. Both CMOS and junction (JFET and bipolar) transistors are needed. A new process has been integrated, based on a 1.2 ??m thick silicon film on insulator (SIMOX plus epitaxy), a complete dielectric...
This paper reviews recent progress in high-speed Si/Si1-xGex heterojunction bipolar transistors. The values of fT and ECL gate delay achieved with these devices are described and compared with results for silicon homojunction bipolar transistors. The technological problems associated with the use of Si1-xGex are discussed, and device and circuit modelling results are presented which highlight the...
InAlAs/InGaAs HFETs having very high indium content (80 and 100%) in the channel have been fabricated on GaAs and electrically characterized. The extrinsic transconductance were 310 mS/mm (560 mS/mm at 77 K), and the saturation current were 700 mA/mm (600 mA/mm at 77 K) for an InAs channel. The value of fT and fmax for this device were measured to be 80 GHz and 50 GHz, respectively. The In0.8Ga 0.2...
In this paper, the correlation between noise figure degradation and the degradation of DC characteristics during emitter-base reverse stress is studied. It was found that the generation-recombination centers, which introduce emitter-base reverse stress, have an influence on high-frequency noise characteristic degradation.
In this work the hot carrier effects in polycrystallinethin-film transistors, mainly related to hot-holes, are analysed by using a two-dimensional device analysis program. The experimental results have been interpreted in terms of formation of trap centers in the gate oxide and interface states. Furthermore, the theoretical analysis of alternate stresses allowed the determination of the extension...
Hot-carrier (HC) degradation of analog operation parameters has been investigated by stressing LDD-n-MOSFETs with channel lengths of 1.0 - 5.0 ??m. A model has been developed to clarify the different mechanisms leading to degradation of the differential drain output resistance. Experimental evidence is given to check the model. Finally, possible consequences in the circuit environment are discussed.
Over the past two decades the scaling of IC technologies has reduced device dimensions by more than 20-fold. In the process of this scaling many reliability and parasitic effects have come to dominate the technology design process. Certainly MOS gate reliability and substrate currents (both due to impact ionization and junction leakage) are of major concern. This paper discusses the parasitic effects...
An analysis and modeling of the low frequency noise characteristics of deeply submicronic CMOS devices is conducted. It is shown that the scaling down of the gate area leads to dramatic change of the noise nature and to a substantial increase of the noise level dispersion. A generic modelling of the noise amplitude and spectrum is worked out as a function of geometry and biases, allowing a good representation...
The chip-on-board (COB) technology offers a compact, low-cost solution to multi-chip packaging. Process-induced thermal and mechanical stresses in COB modules can affect the quality and reliability of the final product. In this paper we present an experimental and numerical study of these stresses.
The Large-Angle-Tilted-Implanted-Drain structure (LATID) has been shown to alleviate hot-carrier induced degradation in NMOSFETs. In a comparison of conventional drain, LDD and several different 0.35 μm LATID NMOSFETs we show that a reduced avalanche multiplication factor and a reduced influence of the generated interface states contribute to this improved hot-carrier reliability. The maximum supply...
This paper reports on the use of Pd-Ge-Ag Au for ohmic contacts to InAlAs/InGaAs High Electron Mobility Transistors (HEMTs). After annealing onto a hot plate, specific contact resistance of 1 10-6??cm2 and 5 10-7 ??cm2 for structures having respectively a 5 nm undoped and a 50 nm n+ doped InGaAs cap layer were obtained in a wide temperature range (380??C-470??C). No thermal degradation was observed...
The early stages of diffusion into crystalline Si from 170 nm thick CoSi2 layers doped with As and B have been studied by a high resolution delineation technique of dopant profiles. The junction shape follows the silicide-silicon interface for B while it is deeper near the grain boundary for As. The different behaviour is related to the different diffusion mechanisms of As and B in the silicide layer...
The trend of increasing the wafer size towards 200-mm is driven by the reduction of the high-volume production cost of large circuits. At the same time, the compatibility with deep submicron processes should be preserved. This dictates tight specifications on the bare substrate itself (e.g. flatness) and on the process equipments, some of which being discussed here. Moreover the increased size and...
Current transient spectroscopy measurements have been applied to characterize deep levels lying in AlInAs/GaAlInAs/AlInAs heterojunction field effect transistors (HFET). The use of various bias conditions (gate to source voltage as well as drain to source voltage) allows the observation of deep levels lying in the different layers of the HFET. The trap characteristics are compared to the defects observed...
This paper describes a novel electronic device using a two dimensional electron gas produced by the strain-induced electric field in [111] growth-axis Al0.35Ga0.65As/In0.2Ga0.8As/GaAs strained layer structure without the necessity of modulation doping. Two dimensional densities greater than 1011 cm-2 were observed both at room temperaure and 77??K. A field effect tranistor using this strain-layer...
A quantitative analysis of the effects causing the maximum cutoff frequency reduction as horizontal device dimensions are downscaled is carried out. Simple analytical expressions describing the geometry dependence of the maximum cutoff frequency fT and forward transit time are derived, and verified with numerical simulations. These expressions suggest a simple method to extract the values of the maximum...
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