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This paper proposes a compact DC-DC buck converter with low output power and very low quiescent current dissipation for use in an ultra-capacitor based wireless sensor networks (WSNs) nodes. This converter is controlled by a self-oscillation topology in order to achieve less silicon area and lower quiescent dissipation than the conventional designs. The work is implemented in the standard 0.35um CMOS...
A 0.39 mA 92 dB dynamic range switch-capacitor (SC) third-order ΣΔ modulator for a digital RF hearing aid in 0.35 μm CMOS is presented here. A modified-feedback topology is used here that effectively achieves a high dynamic range and the low power consumption. In the implementation, the bootstrapping-switch and the low-voltage wide-swing OTA are essentially designed for 1.2 V supply voltage with the...
We present a low-complexity interface circuit for capacitive sensors that are integrated into sensor microsystems. To reduce hardware cost while keeping high resolution, a first-order delta-sigma modulator (DSM), which balances the charge from the capacitive difference between sense and reference capacitors with the charge from a fixed-quantity capacitor, is employed. A charge-mode digital-to-analog...
We present a simple, high-sensitivity, array-based capacitive sensing architecture for biological applications. Conventional charge based capacitance measurement (CBCM) techniques sense grounded coupling capacitances along with unwanted parasitics. These parasitics can be orders of magnitude higher than the coupling capacitances, thus severely reducing the usable sensor dynamic range. The presented...
A 9μW 88dB DR switched-opamp (SO) ΔΣ modulator is implemented in a low cost 0.35μm CMOS process. To evaluate the effects of finite voltage gain and 1/f noise clearly, two high efficient methods are introduced. And a new fully switched-off SO with a 50% power saving and double Figure-of-Merit (FOM) over the traditional type is proposed to reduce the total power. Besides, to improve the performance,...
This work presents a design of continuous-time current comparator with ultra low input impedance, which especially benefits on enhancing the accuracy of pulse-width-modulation (PWM). The proposed design reduces the input impedance by utilizing common-gate structure as input stage. The further use of a common-source feedback structure also enables extremely reduction of the input impedance. In addition,...
This work presents the design of a 1st-order sigma-delta thermal modulator using a thermoresistive sensor in its feedback loop, as the summing and integrating elements. The proposed system architecture allows the measurement of physical quantities that interact with the sensor, as temperature, thermal radiation and fluid velocity. Procedures for obtaining the design specifications needed for its modeling...
In this paper, a CMOS digitized silicon condenser microphone for acoustic applications is newly proposed. The proposed digitized silicon condenser microphone is attractive due to that the sensing sensor and all the circuits are robust and compact to be integrated. Besides, another innovation of this proposed digitized silicon condenser microphone is that it could be operated without charge pump circuits...
A two-phase switching hybrid amplifier for polar transmitters, implemented in 0.35 ??m CMOS, lowers output ripple voltage by ripple cancellation, and boosts static efficiency by 9% due to halved switching loss and reduced ripple current flowing through the linear section of the amplifier. Dynamic efficiency improves by 8 to 12% with an on-chip feedforward bandpass filter.
A silicon nanoplasmonic electrooptic modulator is designed and theoretically analyzed, which is composed of lateral silicon metal-SiO2-Si-metal plasmonic hybrid slot waveguides for phase shifter and ultracompact V-shape splitter/combiner to link the plasmonic waveguides and the Si dielectric waveguides, thus it can be directly implemented into the conventional Si dielectric waveguide based electronic...
A sliding mode control (SMC) algorithm dedicated to switching mode power supply (SMPS) is validated experimentally in a FPGA. A constant high switching frequency is obtained using an hybrid digital pulse width modulator (DPWM). The proposed SMC strategy cooperates with an off-chip ADC and the hybrid DPWM takes advantage of a digital clock manager (DCM) and a counter-comparator based DPWM with a Multi-stAage-noise-SHaping...
This paper examines the design of full feed-forward sigma-delta modulator which is much more suitable for the CMOS digital process with low supply voltage than the traditional second-order feedback loop. The full feed-forward system reduces the modulator's sensitivity of the circuit nonidealities and decreases the internal signal swing to half the full scale. An implementation in a 0.35 ??m CMOS technology...
In this paper a large input swing integrated interface circuit for MEMS microphones is presented. It consists of an high impedance input buffer followed by a multi-bit (12-levels) analog second order SigmaDelta modulator and a fully-digital single-bit fourth-order SigmaDelta modulator. The circuit, supplied with 3.3 V, exhibits a current consumption of 215 muA for the analog part and 95 muA for the...
In this paper, a 14-bit oversampled delta-sigma modulator for silicon condenser microphones is newly proposed. The proposed oversampled delta-sigma modulator is attractive due to that the requirements of silicon condenser microphones are successfully matched. Based upon the device parameters of 0.35 mum 2P4M CMOS technology with 3.0 V power supply, all the functions and performance of the proposed...
This paper presents a complete interface circuit for capacitive MEMS microphones, consisting of the cascade of a preamplifier, a second-order, multi-bit analog SigmaDelta modulator, and a fourth-order, single-bit digital SigmaDelta modulator. The complete interface circuit features a current consumption of 574 muA from a 3.3-V power supply, achieving a signal-to-noise and distortion ratio (SNDR) of...
This paper presents a class D amplifier output stage with low total harmonic distortion (THD) and high power supply rejection ratio (PSRR). The class D output stage reduces the non-linearities and supply noise by means of a second-order negative feedback loop embodying a single stage second-order integrator and a Schmitt trigger comparator. Unlike conventional feedback, the reference input signal...
This paper describes a bi-directional wireless transceiver system for implantable glucose sensing systems. Command and data will be supplied to the implantable module by RF telemetry utilizing an amplitude shift keying (ASK) modulated 2-MHz carrier frequency. An active uplink transceiver utilizing load shift keying (LSK) as backward data telemetry was designed. Half duplex communication between transceivers...
A 434/868 MHz FSK/OOK transmitter with integrated PLL is reported. Direct digital modulation of a fully integrated Sigma-Delta fractional-N PLL frequency synthesizer is used to ensure fine frequency resolution and low phase noise. A wide-band VCO together with an Adaptive Frequency Calibration (AFC) is used to cover the desired bands. A differential-to-single output programmable power amplifier is...
In this paper, we presents the comparison of second-order sigma-delta modulator (SDM) with switched-capacitor (SC) and switched-current (SI) techniques. In the voltage-mode, we use the switched-capacitor parasitic-insensitive integrator to implement this modulator, but in the current-mode we use sample-and-hold circuit which not only consists of a feedback circuit to reduce the impedance at the input...
A CMOS interface for a piston-type MEMS capacitive microphone is presented. It performs a capacitance-to-voltage conversion by bootstrapping the sensor through a voltage pre-amplifier, feeding a third-order sigma-delta modulator. The bootstrapping performs active parasitic compensation, improving the readout sensitivity by ~12 dB. The total current consumption is 460 uA at 1.8 V-supply. The digital...
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