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Embedded passives represent a promising solution regarding the reduction of size and assembly costs of system in package (SiP). In addition, the benefits also include improvements in electrical performance and reliability. Although embedded passives are more reliable by elimination solder joint interconnects, they also introduce other concerns such as deformation and component instability. More layers...
This paper presents an investigation on field returned open and short failures related to printed circuit board (PCB), including via hole crack, prepreg crack and insufficient circuit etching. After an experimental study with cross section, time domain reflectometry (TDR), and finite element (FE) modelling, it was found that weak plating and corrosion induced via hole crack was a major root cause...
This paper targets the reliability of electronics components, specially avionics and automotive electronic system, under random vibration conditions. A fatigue life estimation procedure is presented and each step of procedure is explained. Finite Element model of the test vehicle is built in ANSYS. The model is first validated by correlating the natural frequencies, mode shapes and transmissibility...
Portable products as well as some larger products may see failures by a high strain rate mechanical loading like that seen in a high or low level drop/shock event. Within the portable product industry there is a wide range of product design, usage and loading conditions. Because of this, standards such as JEDEC, which is meant to generate comparative results addressing component reliability, do little...
Due to large mismatch in coefficients of thermal expansion between the copper via and the silicon of Through Silicon Via(TSV), significant thermal stresses will be induced at the interfaces of copper/dielectric layer (usually SiO2) and dielectric layer/silicon when TSV structure is subjected to subsequent temperature loadings, which would influence the reliability and the electrical performance of...
This investigation is aimed at the stability of press-fit interconnections for MID. Moulded interconnect devices (MID) are 3-dimensional substrates produced by thermoplastic injection moulding for large-series applications. The assembly process of press-fit interconnections has been correctly modelled with a FE-Software. With this model the behaviour of the mechanical contact pressure, which decreases...
With the extensive use of Pb-free solder in electronic assemblies, there is a growing concern about the reliability of the solder joint. The need to identify the capability of high speed shear, to reveal brittle fracture failures, was the driving force behind this study. Shearing of 0603 resistors mounted on a PCB with Pb-free solder was considered as the test process setup for modeling and experimentation...
This paper presents the development and evaluation of a large-area carbon-silicon carbide (C-SiC) based composite board material that has the advantages of organic boards in terms of large-area processability and machinability at potentially low-cost while retaining the high stiffness (> 200 GPa) and Si-matched coefficient of thermal expansion (CTE) (~ 2.5 ppm/degC) of ceramics. Test vehicles were...
This paper discusses an optimisation based decision support system and methodology for electronic packaging and product design and development which is capable of addressing in efficient manner specified environmental, reliability and cost requirements. A study which focuses on the design of a flip-chip package is presented. Different alternatives for the design of the flip-chip package are considered...
In this paper, the modeling approaches for first-level solder interconnects in shock and drop of electronics assemblies have been developed without any assumptions of geometric-symmetry or loading symmetry. The problem involves multiple scales from macro-scale transient-dynamics of electronic assembly to micro-structural damage history of interconnects. Previous modeling approaches include, solid-to-solid...
The aim of this paper is to improve reliability of SMD connecting and to increase durability of these structures. 3D finite element analysis has been applied to determine the time-dependent solder joint fatigue response and under accelerated temperature cycling conditions (-40C to +125C, 15min ramps/15min dwells). And definition place with maximal stress value rising in solder joint under shearing...
A wafer level packaging technology ELASTecreg has been developed; which uses a resilient bump contact system. The advantages are twofold; because on the one hand the elastic contact system simplifies wafer probing and on the other hand the elastic interconnects allow an increase in board level reliability. Excessive solder bump straining caused by the mismatch of thermal expansion coefficients (CTE)...
In this paper, the performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track. Secondly,...
Reliability of electronic devices is a crucial scope of interest of the electronic manufacturing industry. The reliability is connected with electrical, thermal and mechanical properties of investigated products. Electrical and thermal properties are investigated during the specified tests such as thermal shocks, temperature, and humidity cycles, dry oven storage. Mechanical properties are concerned...
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