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Over the years, there has been tremendous progress in developing new methods for modeling and diagnosing reliability at the level of individual transistors and interconnects. The thrust to propagate these models to higher levels of abstraction to predict the reliability of larger circuits is much more recent. This paper addresses the intersection of physics, circuits, and architecture for reliability...
This paper provides a historical background of the first developments of compact modeling for circuit-level reliability simulation at UC Berkeley, and the subsequent implementation into the BERT reliability simulator more than 20 years ago. A brief description of the advancement in the technology since then is given, and some industrial perspectives are summarized concerning how such a tool can be...
In the period of extreme CMOS scaling, reliability issues are becoming a critical problem. These problems include issues related to device reliability, in the form of bias temperature instability, hot carrier injection, time-dependent dielectric breakdown of gate oxides, as well as interconnect reliability concerns such as electromigration and TSV stress in 3D integrated circuits. This tutorial surveys...
Power on chip is highly temperature dependent in deep sub-micron VLSI. With increasing power density in modern 3D-IC and SiP, thermal induced reliability and performance issues such as leakage power and electromigration must be taken into consideration in the system level design. This paper presents a new methodology to accurately and efficiently predict power and temperature distribution for 3D ICs.
3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities,...
Reliability failure mechanisms, such as time dependent dielectric breakdown, electromigration, and thermal cycling have become a key concern in processor design. The traditional approach to reliability qualification assumes that the processor operates at maximum performance continuously under worst case voltage and temperature conditions. However, the typical processor spends a very small fraction...
The temperature of 1 micrometer dia spot on a conductor was measured for the first time and compared with the predictions of the simulation model and with the data obtained by the line resistance method. Experiments were carried out to determine the dependence of electromigration lifetime on current density and temperature with an accurate measurement of temperature. These data support that the parameters...
Grain-boundary (GB) erosion-type voids and transgranular slit-like voids are found to be two competing electromigration (EM) failure modes in partly-bamboo interconnects. The effects of metal microstructure, passivation thickness, line width and length, and EM stress conditions on the two failure modes were studied. The kinetics for GB-type failures is strongly affected by the threshold effect in...
For a designer it is important to incorporate reliability aspects in his circuit simulator. This is done via the construction and incorporation of models for degradation mechanisms. In this paper we review benefits, necessary conditions and relevant parameters. Moreover, some examples are given of achievements in this field.
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