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This New top-down fabrication process using bio-template and neutral beam etching process have succeeded to grow GaAs quantum nano disc (ND) for optical communication devices. The size, the alignment and the density of ND were well controlled. Low temperature photoluminescence measurement confirmed that the quantum energy levels were formed in the present structure and made clear the usefulness of...
Quantum dot laser diodes are expected to replace conventional semiconductor laser diodes in new high-speed information and communication devices. We successfully fabricated disk-shaped quantum dots using a bio-template and neutral beam etching. Our original top-down process achieved defect-less and a high density of dots from etching process compared with conventional plasma processes. Therefore,...
III–V compound semiconductor quantum dot (QD) optical devices, such as high-power lasers and high-speed modulators, have great potential for the future of telecommunications and quantum cryptographic communication. We developed a top-down method for fabricating InGaAs quantum nanodisks (NDs) arrays by using bio-template and neutral beam etching (NBE) processes. Damage-free InGaAs/GaAs nano-pillar...
A comparison of ultra-thin insertion layers (GaP and GaP/In 0.4 Ga 0.6 P) on InP self-assembled quantum dots (SAQDs) grown on GaAs (001) substrates using metal-organic vapor phase epitaxy (MOVPE) was studied. Atomic force microscopy (AFM) and photoluminescence (PL) were employed to characterize the optical and structural properties of the grown InP QDs. It is found that the QD dimension,...
We experimentally demonstrate a compact and low-loss InP/InGaAsP polarization converter, fabricated by a simple self-aligned process. The mode-conversion of 96% and the excess loss of less than 1.0 dB are obtained over the entire C-band.
Ohmic I–V characteristics at interface between n-type InAs and n-type Si have been obtained. Single-domain InAs islands (1µm in diameter and 0.5 µm in height) have been grown epitaxially on Si(111) by selective-area MOVPE. After annealing, linear I–V characteristic was observed with excellent reproducibility and the current through the electrode depends on the number of InAs islands beneath the surface...
We propose a simple and efficient off-chip coupler for vertical coupling between optical fibers and InP-based slab waveguides. Etching angle of the waveguide edge is controlled by an etching jig made of SiO2-coated aluminum for ICP-RIE. Simulation shows that maximum 71% coupling efficiency would be obtained by matrix expansion methods.
III-V hetero-integration on silicon is most attractive for lasers, SOAs, and detectors for silicon photonics. InGaAs disks on Si substrate have been grown using micro-channel selective-area metal-organic vapor phase epitaxy. We have measured the luminescent spectra by using the micro-photoluminescence systems and obtained broadband spectra in 1.3–2.1 μm range, suitable for the telecom and the data-communication...
This paper presents a new principle of color changing pixel by controlling the boundary condition for the surface plasmon polariton resonance on a metallic micro/nano mechanical device. A nanometric wire-grid polarizer was developed by the electron-beam patterning of 100 nm thick aluminum on glass; a pair of such polarizers was stacked with a sub-micron gap, and the separation or the in-plane rotation...
Semiconductor integrated photonic devices and circuits on InP for high-speed and large scale optical switching, optical buffer memories, and for digital photonic processing are reviewed, as well as PLC-based optical lead frames for multi-port coupling.
We have already proposed a simulation model for a 90-deg-tilted MEMS mirror, but in some reasons, numerical simulation methods for several angle counter electrode devices are not established. In order to solve these problems, we propose a cascade drive voltage signal technique and demonstrate a 51.5 deg tilted angle counter electrode and assure the effectiveness of the equivalence circuit.
We propose and investigate a novel type of waveguide polarization converter, which is particularly suited for monolithic integration in InP photonic integrated circuits. Efficient mode conversion with 0.4-dB loss and 16.6-dB extinction is demonstrated numerically.
We report a CMOS-compatible low-temperature process for electrostatic MEMS scanner with highly reflective photonic crystal mirror in the near IR region. The photonic crystal was made in the EB-evaporated amorphous silicon layer deposited on the MEMS scanner. The reflectivity was found over 90 % at 1.55 mum wavelength. Mechanical angle displacement of 6 degree was obtained with an applied voltage of...
We have developed novel mask materials against HF Vapor release for MEMS/NEMS. Parylene-C has a tolerant material against moisture pass, and then, thin aluminum layer has also tolerant against HF vapor. We combined them together for high tolerance and we have successfully obtained completely non-etched silicon oxide layer under HF vapor exposure by Parylene/Al/Parylene sandwich structure.
A brand-new flexible microelectrodes array device is made with silicon and polymer MEMS technology. The device can ldquowraprdquo a single axon of a neuron with uniform curvature radius predefined by the integrated ldquocurvature limiterrdquo. The device can measure 3-dimensional potential distribution around the axon surface. By this we are intending to verify if the assumption that an axon works...
The hetero-integration of InP/InGaAs on high doped silicon micro wires for Si hybrid laser using plasma assisted direct bonding was carried out. Bonding assisted pattern was used for increasing the bonding force of the silicon wire to InGaAs/InP bulk. The I-V characteristics of the highly doped silicon micro wire to InP/InGaAs bulk are measured and compared to the Si/InP bulk to bulk results. The...
We present a newly developed skewed-DRIE (deep reactive ion etch) process through a silicon wafer. Maximum skew angle of 25 degrees with respect to the wafer surface was obtained with a 360 micron thick silicon substrate. This technique was used to build the slanted counter electrode of 60 degrees for an electrostatic torsion mirror. Pull-in voltage was 100 volts, which was lower than that of a vertically...
This paper presents a new method of integrating multiple MEMS designs with 40 V class CMOS driver circuits in a multi-user-multi-chip manner. The multi-chip multi-user CMOS-MEMS process was done at 35 mm times 35 mm SOI chip. More than six different designs of SOI-bulk micromachined actuators including the pitch-tunable gratings were monolithically integrated onto the pre-fabricated high-voltage level-shifter...
We report a new design and fabrication of parylene-hinged electrostatic optical scanner made by the SOI-MEMS process technology. Parylene is a CVD-processed organic material of small elastic constant and high chemical stability, and it was found to be suitable to make a low-voltage MEMS scanner of low resonance frequency.
A novel etching and oxidation method utilizing space effect of dry etching for three dimensional silicon structure is presented. Testing devices of SOI symmetric waveguide with ultra thick SiO2 cladding and silicon waveguide structure integrated with 3D taper spot size converter are fabricated using this method.
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