The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A nonvolatile FPGA (NVFPGA) test chip, where 3000 6-input lookup table (LUT) circuits are embedded, is fabricated under 90nm CMOS/75nm perpendicular magnetic tunnel junction (p-MTJ) technologies. The use of a p-MTJ device makes data-backup-limitation free, which essentially eliminates damage control to nonvolatile storage devices. The use of a p-MTJ device also enables the extension towards dynamically...
A nonvolatile FPGA (NVFPGA) test chip, where 3000 6-input lookup table (LUT) circuits are embedded, is fabricated under 90nm CMOS/75nm perpendicular magnetic tunnel junction (p-MTJ) technologies. The use of a p-MTJ device makes data-backup-limitation free, which essentially eliminates damage control to nonvolatile storage devices. The use of a p-MTJ device also enables the extension towards dynamically...
A single-stage RF programmable gain amplifier (RF-PGA) in 65-nm CMOS is presented. The RF-PGA consists of thermometer-weighted transconductors and binary-weighted transconductors with an R-2R ladder. The transmitter prototype with the single-stage RF-PGA achieves 78 dB dynamic range, 0.27 dB accuracy in 1dB step at 1950 MHz. The measured transmitter noise in RX band is -160.4 dBc/Hz. The ACLR and...
This paper proposes a circuit structure which can improve signal-to-noise ratio of a conventional common-gate CMOS LNA for UWB (Ultra-Wide-Band; 3.1-10.6 GHz) using 0.18 um CMOS technology. The simulated results show that the proposed circuit has gain of 16.3-18.8 dB and NF of less than 3dB as well as good compatibility with input matching in a wide frequency range needed in UWB, and it consumes 16...
This paper presents an adaptive equalizer circuit using filter switching for 5 Gb/s data communication over electrical backplane. Most of conventional equalizers are based on amplification of high frequency component of the received signal, and the performance degrades when the line is very short and the attenuation is small. The proposed one solves this issue by using two signal paths, high-pass...
A AAC-decoding, H.264 decoding, media processor with embedded forward-body-biasing and power-gating circuit in CMOS technology is proposed. Since all the components necessary for the scheme are simple MOS circuits requiring no extra supply voltages, they can be placed and routed by a commercial CAD tool. A data-mapping flip-flop was proposed as a high performance and low-power flip-flop. It is concluded...
This paper presents an HDTV video decoder core that is is able to decode MPEG-2, MPEG-4 AVC and VC-1 formats and is fully compatible with the Blu-ray Disc standard. A novel re-configurable architecture is adopted to achieve reduced hardware, and a data compression method suitable for all video decoding standards is applied to reduce memory data usage and access bandwidth. The circuit volume of the...
RF CMOS circuit design techniques for ultrawideband (UWD) applications are presented. In the RF amplifier design, a combination of a constant-k filter and a resistive shunt feedback circuit is suggested for wide-band operation. We report that a circuit integrated by using 0.13-mum CMOS process technology has achieved an operation bandwidth from 2 to 5.8 GHz with a peak gain of 9 dB. In a ring VCO,...
An automated runtime power-gating scheme to reduce the leakage power in the active mode is presented in this paper. We propose a circuit that generates a sleep control signal from a clock-gating control signal automatically. By the combination of selective MT-CMOS scheme, the generated sleep control signal, and a novel flip-flop circuit with an additional latch function, a zero-wait transition from...
A CMOS VCO circuit technique which enables a dynamic GHz-band switching has been described. To get wide band switching, it has been clarified analytically that keeping Q constant is important to configure the circuit. To meet this, an LC VCO circuit which can switch resonant capacitors and inductors simultaneously for switching the band has been suggested. To verify the effect, a dual band VCO circuit...
A dual-band RF CMOS amplifier using variable inductive reactance of LC resonant has been demonstrated. As inductive reactance of LC resonance can be changed by switching the resonant capacitance value, there are advantages that (i) desired inductive reactance can be easily controlled without a need for extra inductors requiring large chip area, and (ii) high reactance value can be obtained more than...
A novel complementary quadrature LC oscillator is presented for achieving lower phase noise. One proposed and three conventional structures, designed in a 0.18 mum CMOS technology, are simulated in both the triple-well and the twin-well (exactly the quasi twin-well) process technologies and each phase noise is compared. These circuits operate at 5 GHz and draw 8.6 mA from a 1.8 V supply. In the triple-well...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.