The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Digital circuits are more resilient to PVT variations, has smaller area and lower power consumption than analog circuits. In this paper, two digital techniques, wait state and time slot, were used to solve the timing failures in the operation of the digital processing block of a power line sensor node. In this sensor node design, timing failures occur because of two reasons: 1) the power-on reset...
The push to make crucial circuits like voltage references to work in ultra-low bias currents magnify previously ignored leakages incurred by further process scaling. These leakage currents, mostly temperature-dependent and already comparable to the bias currents, will add significant error to the output voltage of such voltage references degrading its temperature coefficient (TC). In this paper, the...
With the emergence of energy-starved systems like wireless sensor nodes, it becomes much more of a necessity for important blocks in such systems like the voltage reference (VR) to work at an ultra-low power consumption. Furthermore, the varying requirements of the functional blocks of a wireless sensor node (WSN) entail varying VR requirements, therefore flexibility in the design of VRs is required...
A sensor platform is a station equipped with extensive sensor and communication systems, which provide space based detection and alert capabilities. It consists of low-power, embedded computing devices known as motes, which use sensors to collect measurements from the physical world and its inhabitants. In this paper, an ARM-based sensor platform running a Linux Operating System is designed and implemented...
The delay dependency of digital circuits on process, voltage and temperature variations are usually compensated by using safety margins that set the limit of operating supply voltage or clock frequency. Razor enables the processor to operate beyond this safety margin through the utilization of error detection and recovery circuits. In this paper, a single chip dual ARM9 core solution, with and without...
Supply voltage scaling greatly reduces the power consumption of circuits and is typically used in applications with loose speed constraints but tight power budgets. However, without digital standard cell libraries characterized at low voltages, integration of this technique is difficult in the semi-custom design flow. Thus, digital circuits are synthesized at the nominal voltage and their operating...
In this paper, the design of an ultra-low voltage standard cell library is discussed. This includes the design constraints in designing each gate on a schematic level as well as techniques used in designing the layout. The method of performing timing and power characterization of the standard cell library and how the logical and physical library files are generated are discussed. The accuracy of the...
A novel low voltage reconfigurable FGMOS OTA is proposed that allows the manipulation of the OTA's input capacitance for wider tuning without additional power consumption. Schematic simulations using the AMS 0.35µm CMOS process with a VDD=1.8V, show a minimum DR of 69dB is achieved with capacitance tuning and at least 63dB with current bias tuning using at least 29.4µW of power. When used in a third...
Issues with typical low-cost, low-power sensor nodes in System-on-Chip designs include component integration, energy efficiency and reusability. These are solved by implementing a standard communication protocol like the Advanced Microcontroller Bus Architecture (AMBA) that allows low-power designs. An AMBA system prototype is designed, implemented, and characterized on an FPGA platform, with ARM9TDM...
This paper discusses a restructured laboratory course in semiconductor device theory. Also described in this paper are the fabricated custom-designed ICs which will be used in the new sets of experiments that will be integrated in the restructured course. It aims to fortify the students' understanding of fundamental semiconductor device concepts to help them model and design integrated circuits even...
With the increasing popularity of mobile and energy-limited devices, the trend in the field of microprocessor design has shifted from high performance to low power operation. A common low power technique is reducing the supply voltage during periods of low utilization. However, this is limited by the safety margins needed to protect the processor from infrequent voltage glitches and environmental...
A new low voltage FGMOS OTA is proposed that can achieve high transconductance efficiency and offers flexibility in tuning that is suitable for gm-C ladder filters. OTAs with higher transconductance efficiency contribute to higher filter dynamic range for a given power consumption. Schematic simulations show efficiencies of up to 50 for a minimum DR of 63dB were achieved in an AMS 0.35µm CMOS process...
A new triode OTA suited for low voltage high frequency applications is proposed. Based on the core Enz' OTA, self-cascodes are utilized to increase its operating frequency. Designed in an AMS 0.35µm CMOS process, simulation results show that the circuit attained a bandwidth of 78MHz. It also provides an SFDR of 73 dB for a 1MHz, 1.1VPP differential input. A wide gm tuning range of 9 is also achieved...
We report an implementation of a 32-bit DLX Microprocessor capable of operating in a dual core environment. The processor was modified for it to be capable of operating atomic instructions, a requirement in a dual core environment. The dual core environment was simulated using a similar core acting as a pseudo slave core. The resulting processor can then be interfaced with another instance of the...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.