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This paper investigates the effects of top fin width scaling (Wtop = 4, 6, 8 nm) of p-and n-type 10-nm FinFET on the electrical performance of the device, specifically optimized for low performance (LP) and high performance (Hp) devices. The work also studies the correlation of the metal work function to the device performance. It is observed that the transfer characteristics shown increased drain...
Negative-bias temperature instability (NBTI) has become a prominent factor limiting scaling of complementary metal–oxide–semiconductor technology. This work presents a comprehensive simulation study on the effects of critical design parameters of 32-nm advanced-process high-kp-channel metal–oxide–semiconductor field-effect transistors on NBTI. The NBTI mechanism and defects were explored for various...
A major effect of different measurement delay in seconds is revealed through quasi DC Stress Measure Stress experiments. We found that different delay of measurements in seconds contributed to different stress time needed to achieve target 10% degradation of Vth. The longer delay, the more time needed for the device to achieve 10% degradation of Vth. The effect on NBTI degradation is shown to be reliant...
Negative Bias Temperature Instability (NBTI) has become a key reliability concern in semiconductor industries as devices are scaled down. A simulation study had been done on 32 nm technology node PMOS using Synopsys TCAD Sentaurus simulator tool. This paper presents the effect of gate length on NBTI of 32 nm advanced technology high-k metal gate (HKMG) PMOSFET. The effect on the device parameters...
MEMS intraocular capacitive pressure sensor is used for monitoring glaucoma disease. The structure of the diaphragm of MEMS capacitive pressure sensor is one of the important factors which could affect the sensor's performance. In this paper, Taguchi and Two-Level Factorial approach are employed to optimize the size of diaphragm thickness, slot width, and slot length. The typical range of intraocular...
This paper presents a simulation framework for reliability analysis of PMOS devices in the TCAD Sentaurus environment. The degradation of parameter is based on the numerical solution for the two-stage NBTI model mechanism. We demonstrate and analyze the voltage degradation, Vth of a high-k HfO2 dielectric pMOSFET structure with effective oxide thickness (EOT) of 1.092 nm. After 1000s of stress, the...
Lifetime of pMOSFETs is limited by negative bias temperature instability (NBTI). NBTI causes the degradation of drive current and threshold voltage of p-MOSFETs. This paper presents the comparison of DC and pulse train analysis on sub micrometer pMOSFETs lifetime prediction using on-the-fly (OTF) method. The SiO2 conventional PMOS transistor having effective oxide thickness (EOT) between 1.8nm and...
It is well-known that the miniaturization or scaling down process of integrated circuits (ICs) has lead to the reliability issues such as Hot-Carrier (HC) and Negative Bias Temperature Instability (NBTI) effects which are very significant on p-type MOSFET. A negative voltage is applied to the gate of a pMOSFET and it attracts more holes towards the Si/SiO2 interface. Thus the inversion holes weaken...
Negative Bias Temperature Instability (NBTI) has become one of the critical reliability concerns as scaling down CMOS technology especially on the pMOSFET device. A simulation study had been conducted on 32 nm conventional pMOSFET using the technology CAD (TCAD) Sentaurus Synopsys simulator tool. In this paper, the effects of the gate oxide thickness together with drain bias variations on the NBTI...
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