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Silicon interposer based 2.5D IC can realize heterogeneous integration and is effective to implement an electro-optical system. In this paper, we analyze the CPW structure transmission line on silicon interposer for high speed electro-optical system. The RDL-TSV-RDL transmission structure is used to reduce the resonance. An optimization method is proposed to improve the performance of the RDL-TSV-RDL...
In this paper, a gas turbine-based distributed energy system (DES) model is developed for the design of operation planning. An operation mode aimed to optimize the operation of this DES is proposed. A multi-objective cost function considering the total system efficiency and operational cost is formulated for the optimal design of DES operation and control. A two-stage approach combining the particle...
To meet the requirements of the next high generation high-performance networking switches and routers, system integration based on the Three-dimensional (3D) System-in-Package (SiP) technology is being studied and developed. In this paper, we report the development of a 3D SiP using the organic interposer technology. A 3D SiP is designed and manufactured with a large size organic interposer with fine-pitch...
This paper focuses on the joint study of membrane computing with job shop scheduling problem. We use membrane to conduct the whole process of computation, which can obtain all possible combinations of operations and machines by evolution rules and calculate the whole computing time by communication rules, complete the order of every artifacts, output the final result through communication rules and...
In this paper, the optimal Context quantization for the source is present. By considering correlations among values of source symbols, these conditional probability distributions are sorted by values of conditions firstly. Then the dynamic programming is used to implement the Context quantization. The description length of the Context model is used as the judgment parameter. Based on the criterion...
To enable three-dimensional (3D) ASIC and memory integration, large-size silicon interposer is a critical technology [1]. Currently most silicon interposers are manufactured by wafer foundries and are limited in size by the wafer lithographic processing. In this study, manufacturing of cost- and performance-effective, large-size silicon interposers are investigated. The existing supply chain and infrastructure...
We report on the fabrication of fiber Bragg grating in a dual-concentric-core fiber. The temperature and strain sensing performance of this grating is demonstrated as well.
We report on a theoretical and experimental investigation to demonstrate that the birefringence of a commercial polarization-maintaining photonic crystal fiber (PMPCF) can be enhanced almost one order of magnitude by scaling its diameter down to ∼50 µm.
A novel multi-agent membrane computing technique is proposed. We provide a new membrane structure on graph to construct a multi-agent membrane system, which offers a new framework for collaboration and resources sharing among designers. The new design environment provides a tool to extend designer's ideas with the help of communication rules of membrane. Shapes were generated and changed in membrane...
3-D, stacked ICs offer a promising solution to speed, power and density requirements, as the industry strives to scale to Moore's Law. Through Silicon Vias (TSV) are integral parts to 3-D stacked ICs. TSVs shorten interconnects between logic elements, thus reducing power while increasing performance. TSVs may comprise a significant portion (both logically and physically) of the 3D die stack. It's...
In the literature for error propagation, there have been many methods such as Monte Carlo simulations and Taylor expansions. Among them, the Taylor expansion method is popular since it not only gives the propagation relationship, but also can reveal the effects of small perturbations away from the true value. One-order Taylor expansion method, as a linear approximation, has been studied extensively...
Using membrane computing to do some creative design is a new approach in this field. We use multi-sets of P system to assign customers' requirements and experienced models, constructing P system with rewriting rules which is suit for our design, getting the results that we want. All of the above steps are carried out in membranes. Because of the high parallelism of membrane computing, we can get the...
The bandwidth for high performance networking switches and routers increases two to ten times in every new generation. This in turn drives the bandwidth requirements for the Application Specific Integrated Circuits (ASICs) and their external memory devices designed for the high performance network systems. 3D IC integration with its low power, high density and high bandwidth advantages is proposed...
Using DNA computation to solve graph clustering problem is a new approach in this field. We use DNA strands to assign vertices and edges, constructing the minimum spanning tree and cutting branches whose length is longer than the threshold. All of the above steps are carried out in test tubes. Because of DNA computation's high parallelism, we can get the results rapidly.
The microstructure and mechanical behavior of Sn-Ag-Cu (SAC) soldering alloys can change significantly over time when exposed to isothermal aging and in-situ current stress. Electronics assemblies built with SAC solder joints are exposed to elevated ambient temperatures and relatively high current densities for prolonged periods of time. Therefore it is important to understand the impact of these...
High end networking and computing applications continue to drive silicon technologies for higher data rates and increased bandwidth. The push for silicon performance with 45nm and 32nm devices also drives a need for packaging performance to deliver clean and efficient power to the device. This paper compares the electrical performance, assembly and reliability of various advanced packaging technologies,...
Chip-scale package (CSP) is commonly seen on high density boards as it minimizes the foot print while packed more functionality into one component. Board level reliability concern over CSPs is that finer pitch limits the solder ball size attached and the stencil thickness used in assembly which leads to much smaller joint volume and standoff while larger die-to-package ratio typically means higher...
For electroplated Sn and Sn alloy finishes, one of the reliability concerns remains the risk of whisker growth. Results from recent work have suggested that whiskers are most likely to form in regions of the films where high stress or a stress gradient exists. If strain/stress distribution information can be collected at a grain-by-grain level, correlations between such information and the propensity...
Thermally cycled PBGA packages with a full array of 196 solder joints after various pre-conditions are examined to observe the microstructure evolution of Sn-Ag-Cu solder joints during aging and thermal cycling, focusing on Sn grain orientation. Each PBGA package was polished to obtain plan view cross sections of every solder joint, and characterized using both Polarized Optical microscopy and Orientation...
In an ever-increasingly connected world, the boundaries or obstacles to accessing information are being torn down by business necessity, personal preferences and technical innovations. The Borderless Network is creating the ability for customers to work anywhere, with any device using services and applications like video, collaboration, with a secure, reliable and seamless communication experience...
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