The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Meeting the quality and reliability requirements of the ISO 26262 and other automotive electronics standards will only become more difficult as device sizes and complexities continue to grow. New advanced test technologies such as cell-aware ATPG, hybrid compression / logic BIST / memory BIST and diagnosis-driven yield analysis with RCD provide some key building blocks towards ensuring compliance...
The semiconductor industry is encountering an increasing number of front-end-of-line defects in the advanced FinFET technology nodes due to extremely small feature size and complex manufacturing processes required for FinFET transistors. Traditional delay diagnosis algorithm has a limited support for cell internal timing related failures based on transition delay faults, and tends to provide a large...
Traditionally, the foundry is responsible for yield enhancement when excursion yield loss occurs. Sometimes the cycle time to fix the problems is too long and can be unpredictable due to a lack of design details and process uncertainty on the foundry side. In order to reduce overall cycle time for fixing excursion yield loss, the fabless company can give the foundry insightful information of defect...
Without appropriate stitching of scan chains, even with good diagnosis algorithm and diagnostic pattern generation, the chain diagnostic resolution may still be bad. In this paper, we propose a novel pattern-independent diagnosis and layout aware (DLA) scan chain stitching method: 1) the resolution is improved by increasing and properly distributing the sensitive scan cells, which can capture useful...
Without appropriate stitching of scan chains, even with good diagnosis algorithm and diagnostic pattern generation, it may still result in bad scan chain diagnostic resolution. To improve the diagnostic resolution, we propose a novel Diagnosis and Layout Aware (DLA) scan chain stitching method, which is pattern independent and supports embedded scan compaction. It is based on three ideas: (1) increasing...
Extraordinary power consumption during the scan test may inadvertently cause a functional good die to fail. This paper proposes a peak power reduction algorithm for the scan test which considers both the shift cycles and capture cycles simultaneously to limit the peak power of all test cycles during the test generation. In addition, the analysis also recommends the types of circuit structures that...
In this poster, we share our industrial experiences on running chain diagnosis and PFA (Physical Failure Analysis) on a wafer that suffered from low yield. In addition, case study on PFA will be illustrated.
In the past, software based scan chain defect diagnosis can be roughly classified into two categories (1) model-based algorithms, and (2) data-driven algorithms. In this paper we first analyze the advantages and disadvantages of each category of the chain diagnosis algorithms. Next, an adaptive signal profiling algorithm that can use manufacturing ATPG scan patterns is proposed for scan chain diagnosis...
This paper describes how ASIC vendors can develop customized memory test algorithms to enhance their overall IC testing strategy. BIST test algorithm was used in order to address new defect mechanisms emerging at advanced process nodes.
Yield enhancements in the manufacturing process today require an expensive, long and tedious physical failure analysis process to identify the root cause. In this paper we present Axiom, a new technique geared towards efficiently identifying a single dominant defect mechanism (for example in an excursion wafer) by analyzing fail data collected from the production test environment. Axiom utilizes statistical...
In this paper we present practical techniques that enable diagnosis of defective library cells in a failing die. Our technique can handle large industrial designs and practical situations like compressed test patterns with multiple exercising conditions per pattern and sequence dependent defects. Being able to accurately differentiate between cell-internal and interconnect defects leads to a faster...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.