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Germanium has emerged as an exciting alternative material for high-performance scaled CMOS, however not without difficulties. After a review of the state-of-the-art, mainly focusing on two techniques to passivate the channel/dielectric interface, we analyze the strengths (carrier mobility, band gap), and weaknesses (n-type doping, lattice mismatch and BTBT leakage) of Ge for MOSFETs. We also identify...
This paper studies the influence of the 45deg substrate rotation on the analog parameters of n-type and p-type triple-gate FinFETs with HfSiON gate dielectric, TiN gate material and undoped body. Tall triple-gate n-type and p-type FinFETs were fabricated on SOI wafers with 150 nm thick buried oxide. The fin height (HFin) is 65 nm for all devices. It has been demonstrated that the substrate rotation...
In this work, we investigate the impact of post-deposition nitridation of the MOCVD HfSiO gate dielectric and the TiN gate electrode thickness on the electrical parameters of SOI multiple-gate FETs (MuGFETs). It is shown that nitridation reduces the EOT, enhances the gate leakage current and reduces the mobility. Although, HfSiON gate dielectric can reduce the work function (WF) sensitivity on the...
To assess the impact of strain on negative bias temperature instability (NBTI), systematic studies were performed on devices with polycrystalline-Si/SiON as well as deposited metal gate/high-kappa and FUSI/high-kappa gate stacks. The effects of compressive stress, which acts as performance booster for PMOS devices, were studied, with strain introduced by stressor layers as well as SiGe source/drain...
This paper presents the operation of uniaxially strained SOI nMOSFETs at cryogenics temperatures with emphasis in the most common analog figures of merit as the intrinsic gain, output conductance and linearity.
The downscaling of CMOS below 45 nm has triggered the use of high-mobility substrates in order to compensate the mobility degradation related to the implementation of high-k dielectrics. Strain engineering has become a very popular technique to boost up the mobility and drive current. This paper discusses the electrical performance of junctions and transistors processed in strained Si on thin (250-350...
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