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A 648 MHz 153.8 mm2 45 nm CMOS SoC integrates eight general-purpose CPUs, four dynamically reconfigurable processors, two 1024-way matrix-processors, peripherals and interfaces. Using core enhancement, DDR3-I/F improvement and clock buffer deactivation, this SoC achieves 37.3 GOPS/W at 1.15 V.
This paper presents a 0.13 um BiCD process (BiCD-0.13) based on a 0.13 um standard CMOS technology with a superior Deep Trench Isolation(DTI). Merits of using DTI are to improve breakdown voltage, reduce parasitic transistor actions and increase area density, compared with Junction-Isolation. We simulated the stress and the device characteristics, and optimized the parameters of DTI design and process...
Toshiba's 5th generation BiCD/CD-0.13 is a new process platform for analog power applications based on 0.13 mum CMOS technology. The process platform has six varieties of rated voltage, 5V, 6V, 18V, 25V, 40V, and 60V. 5 to 18V CD-0.13 process use P-type silicon substrate. 25 to 60V BiCD-0.13 process use N-Epi wafer with N+/P+ buried layer on P type silicon substrate. Each LDMOS recode ultra-low on-resistance...
Panel-sized TFT-LCD column drivers have been fabricated on a glass substrate with TF CMOS and low-resistivity copper-plated interconnections. These operate with a 16.25MHz internal clock, have 6b DACs, 6b accuracy with either 3072 or 1536 outputs, and use an offset-controlled amplifier. The operation of 15 inch XGA LCDs is demonstrated using panel-sized column drivers.
A compact high-resolution RBS (HKBS) system, consisting of a simple magnetic spectrometer and a small accelerator, is used for Nano-CMOS applications. The HKBS system has several attractive features, e.g. capability of depth profiling with monolayer depth resolution, small footprint, reasonably short measuring time. Several examples of the applications are presented, which include observation of high-k/Si...
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