Serwis Infona wykorzystuje pliki cookies (ciasteczka). Są to wartości tekstowe, zapamiętywane przez przeglądarkę na urządzeniu użytkownika. Nasz serwis ma dostęp do tych wartości oraz wykorzystuje je do zapamiętania danych dotyczących użytkownika, takich jak np. ustawienia (typu widok ekranu, wybór języka interfejsu), zapamiętanie zalogowania. Korzystanie z serwisu Infona oznacza zgodę na zapis informacji i ich wykorzystanie dla celów korzytania z serwisu. Więcej informacji można znaleźć w Polityce prywatności oraz Regulaminie serwisu. Zamknięcie tego okienka potwierdza zapoznanie się z informacją o plikach cookies, akceptację polityki prywatności i regulaminu oraz sposobu wykorzystywania plików cookies w serwisie. Możesz zmienić ustawienia obsługi cookies w swojej przeglądarce.
This work presents SOI finFETs with fin width (Dfin) scaled to sub 15nm. The process flow provides robust Dfin scaling as depicted by the universal electrostatic scaling of the DIBL and sub-threshold swing (SS). The high field long channel mobility drops by ∼6% with Dfin scaling, however, DIBL and SS improves by ∼1.5X and ∼2X, respectively, for 20nm channel length n/pfinFETs. The effective current...
Ge exhibits a high bulk hole mobilty making it an attractive channel material for pMOSFET devices [1,2]. For improving the device performance and suppressing short channel effects ultra-thin-body (UTB) Ge-on-insulator (GeOI) structures have been researched throughly [2]. Recently <110> oriented Ge-OI pMOSFETs grown on (110) surface were shown to exhibit enhanced hole mobility, which was 3 times...
The thermoelectric power-factor (PF) and efficiency (ZT) of GaAs nanowires (NWs) can be improved by (i) choosing a proper wire growth and channel orientation, (ii) by applying uniaxial tensile stress, and (iii) suitable wire cross-section size. In this work we study the impact of these three factors on the PF and the ZT. Tensile stress, channel direction and cross-section size allows bandstructure...
III–V semiconductors can provide a viable option for continuous scaling of future CMOS technology [1–3]. We report a significant enhancement in the ON-current (ION) of ultra-thin body (UTB) GaAs intrinsic channel p-MOSFETs using biaxial compressive strain. Our theoretical investigation shows that valence bands (VB) become hyperbolic under compressive strain in GaAs rendering effective mass approximation...
Our experiments show that linearity can be achieved if transistors are designed to operate in the one-dimensional ballistic transport regime in the quantum capacitance limit. We report third order intercept points (IIP3) of around −13dBm at maximum transconductance under these particular transport and device operation conditions, meeting the requirements for state-of-the-art mobile communication systems...
In the last few years, evolutionary computing (EC) approaches have been successfully used for many real world optimization applications in scientific and engineering areas. One of these areas is computational nanoscience. Semi-empirical models with physics-based symmetries and properties can be developed by using EC to reproduce theoretically the experimental data. One of these semi-empirical models...
Ultra-scaled SiGe nanowire FETs (NWFETs) are an attractive candidate in achieving faster p-type devices compared to Silicon. This work investigates the performance of SiGe nanowire FETs (NWFETs) using a Virtual Crystal Approximation (VCA) method based on an atomistic Tight-Binding (TB) model. The electronic structure calculation is self- consistently coupled to a 2D Poisson solver. The spatial charge...
Podaj zakres dat dla filtrowania wyświetlonych wyników. Możesz podać datę początkową, końcową lub obie daty. Daty możesz wpisać ręcznie lub wybrać za pomocą kalendarza.