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N-polar GaN field-effect-transistors (FETs) have the potential advantage in scaling to sub-50nm gate lengths because of the confinement provided by the wide bandgap back-barrier. High-performance enhancement-mode (E-mode) N-polar GaN devices with self-aligned source/drain have recently been demonstrated with a current gain cut-off frequency (ft) of 120 GHz at a gate length of 70 nm [1]. Further scaling...
We report the demonstration of photonic crystal lasers formed bottom-up by patterned III-V nanopillar (NP) arrays. In this work, we present a method whereby the photonic band gap region and active gain regions are formed simultaneously by selective-area metal-organic chemical vapor deposition. This approach allows us the ability to design device parameters lithographically. By accurate control of...
We report on the design, fabrication, and characterization of the first interband tunnel junctions showing forward tunneling characteristics in the III-Nitride system. We have achieved record forward tunneling currents (>100 mA/cm2 at 10 mV, and > 10 A/cm2 peak current) using polarization engineered GaN/InGaN/GaN heterojunction diodes. We also report for the first time, negative differential...
III-V MOSFETs are currently being considered as a candidate for future high performance transistors [1]. In particular, In1-xGaxAs compounds are investigated for application in digital logic due to their advantageous electronic properties [2]. III-V technologies may be introduced beyond the 22 nm node, which will require a self aligned III/V device architecture as well as integration of high-?? gate...
Biology is curved, soft and elastic; silicon wafers are not. Semiconductor technologies that can bridge this gap in form and mechanics will create new opportunities in devices that require intimate integration with the human body. This talk describes the development of ideas for electronics that offer the performance of state-of-the-art, wafer-based systems but with the mechanical properties of a...
A scaling path for Si based technology seems possible to the 8nm node. Power limitation will force to reduce the supply voltage at the expense of device performance and susceptibility to process variations. A lower limit of Vdd=0.5V seems feasible. Parallelism on system level will provide system through put which stresses architecture and software development. In particular legacy code will be a problem...
All of conventional nitride-based light emitting diodes (LEDs) and laser diodes (LDs) available in a market have been grown on polar (C-plain) plain GaN. Nonpolar and semipolar plain GaN are getting popular recently to improve the performance of those devices further. In the case of LDs, the nonpolar and semipolar plains have a several advantages. Non-isotropic strain changes the density states of...
Due to their high electron mobility, III–V semiconductors are promising channel materials for future devices [1]. InAs is one such promising material; however, due to the small bandgap (Eg∼0.36 eV) bulk devices are not feasible. In addition, heteroepitaxial growth of thin layers on Si is challenging due to the inherent lattice mismatch. Here, we present a platform developed for integration of single-crystalline...
Compound semiconductors such as In0.7Ga0.3As and InSb are being actively researched as replacement for silicon channel materials for logic applications due to their superior transport properties [1,2]. Planar III–V quantum-well FETs have already demonstrated with superior performance than the state-of-the art Si MOSFETs for low supply voltage (Vcc) applications [1–3]. A key research challenge remains...
Given adequately low source/drain (S/D) access resistivity and dielectric interface trap density (Raccess < 50 Ω-µ,1 and Dit < 2 · 1012 cm−2 eV−1,2 respectively), InGaAs MOSFETs will provide greater on-state current than silicon MOSFETs at the same effective oxide thickness (EOT). The access resistance must be obtained in a self-aligned structure with a contacted gate pitch ∼4 times...
InAs is an attractive channel material for III–V nanowire MOSFETs and early prototype high performance nanowire transistors have been demonstrated1. As the gate length is reduced, the nanowire diameter must be scaled quite aggressively in order to suppress short-channel effects2. However, a reduction in transconductance (gm) and drive current (ION) could be expected due to increased surface scattering...
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