Serwis Infona wykorzystuje pliki cookies (ciasteczka). Są to wartości tekstowe, zapamiętywane przez przeglądarkę na urządzeniu użytkownika. Nasz serwis ma dostęp do tych wartości oraz wykorzystuje je do zapamiętania danych dotyczących użytkownika, takich jak np. ustawienia (typu widok ekranu, wybór języka interfejsu), zapamiętanie zalogowania. Korzystanie z serwisu Infona oznacza zgodę na zapis informacji i ich wykorzystanie dla celów korzytania z serwisu. Więcej informacji można znaleźć w Polityce prywatności oraz Regulaminie serwisu. Zamknięcie tego okienka potwierdza zapoznanie się z informacją o plikach cookies, akceptację polityki prywatności i regulaminu oraz sposobu wykorzystywania plików cookies w serwisie. Możesz zmienić ustawienia obsługi cookies w swojej przeglądarce.
This paper presents the design of a third-order ΣΔ modulator targeted for WCDMA applications. The architecture uses two operational amplifiers and distributed fully digital feed-forward paths to minimize the output swing of op-amps. Simulation results show that first and second integrator output swings are reduced by 88% and 75%, respectively. Post-layout simulation results of the modulator, designed...
A second-order multi-bit hybrid continuous-time (CT) ΣΔ modulator has been implemented in a 65-nm CMOS technology. The circuit ensures jitter immunity granted by the use of multi-rate switched-capacitor (SC) DACs. An auxiliary digital assistance technique reduces integrators output swing. The modulator provides 10.8 bits of resolution over a signal bandwidth of 1.1 MHz and a spurious free dynamic...
A technique for the exact design of the noise transfer function of Continuous-Time (CT) Sigma-Delta modulators with arbitrary and multiple DAC responses and real op-amps is here presented. The approach, that presupposes linear behavior of active blocks, produces a CT modulator with the same noise shaping as its Discrete-Time counterpart. The method operates entirely in the time domain and accounts...
A method that virtually double the oversampling ration of a second order sigma-delta (ΣΔ) modulator is described. Accounting for a limited cost, the resolution increases by about 2-bit and power just increases by few percents. Therefore, the FoM diminishes by a factor close to 3.5. Simulation at the behavioral level of the proposed method verifies the operation. Circuit level schemes indicates that...
Methods for avoiding the slew-rate limit and the optimal design of hybrid Continuous-Time (CT) ΣΔ modulators with switched-capacitor (SC) DAC are discussed. Limitations on performance due to finite bandwidth and slew-rate of the operational amplifier are analyzed. The use of multi-rate scheme made by a set of time-interleaved SC-DAC moderates the non-linear error caused by the limited slew-rate in...
This paper presents a third-order Sigma-Delta modulator that uses only two operational amplifiers. A fully digital solution reduces both amplifiers output swings. This design achieves complex conjugate zeros that allows obtaining a signal-to-noise ratio of about 8 dB better than having all the zeros placed at z = 1. Behavioral level simulations demonstrate the effectiveness of the approach.
A new design approach operating in the time domain for the design of Continuous-Time (CT) ΣΔ modulators is presented. The method obtains CT modulators that are exactly equivalent to Sampled-Time (SD) counterpart without any constraint on the shape of feedback DACs responses. The procedure is suitable and powerful for transistor-level studies because design can be performed directly using circuit simulators...
The design of Continuous-Time (CT) Sigma-Delta modulator obtained by a discrete-time prototype is discussed. A proper heuristic transformation of the prototype enables an exact equivalence of CT and DT. This permits the trimming by computer simulations of the coefficients of the CT to account for the effect of real analog blocks. Simulation results for a second and third order scheme with real DACs...
Podaj zakres dat dla filtrowania wyświetlonych wyników. Możesz podać datę początkową, końcową lub obie daty. Daty możesz wpisać ręcznie lub wybrać za pomocą kalendarza.