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This paper reports on a large-size CPU package for UNIX servers which employs embedded thin film capacitor layers. The substrate of this package has two thin film capacitor layers in the surface of the core layer, which has a capacitance of 25 uF in total. In order to adopt this package substrate, we confirmed the effect of the thin film capacitor layers on the package assembly process. We actually...
This paper proposes a method of improving power delivery in a CPU package substrate with multilayer thin film capacitors (TFCs). Because TFC embedded technology can reduce the inductance of power delivery path, it can stabilize the power supply to the CPU. Higher permittivity, thinner layer thickness and wider conductor plane area results in larger capacitance. To further stabilize the power supply,...
This paper reports on second-level interconnection development for a large-scale Ball Grid Array (BGA) package. Generally, control of warpage becomes a problem as BGA packages become larger. To solve this problem, the following two measures were executed. The first was adoption of a low-temperature solder, and the second was warpage control using a heat spreader as a fixture. We were able to decrease...
The electrical characteristics of the power supply path, which are influenced by the via structures in the build-up substrate were investigated. The build-up substrates are composed of core layers and build-up layers, connected by the plated through hole (PTH), and the build-up via (BU via), respectively. This paper investigates how the BU via structures affect the power supply path, and discusses...
Due to inadequate rigidity, warpage of coreless substrates is generally large compared to other types of LSI package substrates. Therefore, the most important problem in the application of coreless substrates is warpage reduction during the reflow process. So far, there have been only a limited number of reports on coreless substrates for large-size LSI packages. Moreover, there have been very few...
This paper reports on the development of CPU package for the next-generation supercomputer, besides a report of the assembly technology development of a large-scale BGA package that mounts large-scale chip. A large-scale LSI is mounted on CPU package developed this time. The size of a large-scale LSI is about 23.0×23.0mm. In addition, low permittivity (Low-k) material is adopted in interlayer dielectric...
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