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As mobile electronics are continuously driven for compact, slim and lightweight, miniaturization of IC packaging has been a must. There are increasing Wafer Level Chip Scale and fan-in Package (WLCSP) employed in electronics to achieve the miniaturization. Since WLCSP just is the Die with solder balls attached, WLCSP has the smallest footprint and the lightest weight compare to substrate base and...
As mobile electronics are continuously driven for compact, slim and lightweight, miniaturization of IC packaging has been a must. Coreless substrate with fine-trace embedded technology is a key to achieve package miniaturization. Compare to conventional substrate, coreless substrate technology eliminates the substrate core, and utilize build-up layers to interconnect the chip and the PCB board. It...
In the recent years, compact, slim and lightweight mobile electronics are requested from customers. Miniaturization of IC packaging has been a must. Coreless substrate technology is the key to achieve it. Compare to conventional substrate, coreless substrate technology eliminates the substrate core, and utilize build-up layer to interconnect chip and the motherboard. It brings about not only low z-height,...
Gold wire has been high volume production in 1С packaging industry. With soaring price of gold in recent years and 1С packaging search for cost reduction, copper wire offers 2nd alternative for wire bonding type assembly. But copper wire has drawbacks in control issues such as pad crack, aluminum splash, cratering and low throughput, Cu wire need a more complex multi-processing program to solve above...
Traditionally, gold wire has been high volume production in IC packaging industry. With soaring price of gold in recent years and the of cost-efficiency, copper wire offers an alternative for Microelectronic Assembly. But copper wire has drawbacks in process control issues such as pad crack, aluminum (Al) splash, cratering and low throughput. Those limitations of copper wire are related to pad weakness...
It is well-known that thick substrate core has obviously increased package thickness and also weakened device performance, including electrical and thermal points of view. Therefore, as a NEW innovative coreless structure, a substrate with the features of lead-frame with pre-molding compound techniques has aroused lots of attention in IC semiconductor industry. It has brought not only thin package...
Wire bonding technology has been the mainstream for stacked die packages for over five years. Yet, based on current design rule, the package body size increases with respect to the number of dice stacked in the package. Furthermore, the electrical performance is greatly dependant to the wire length. By applying Vertical Circuit Interconnection technology, VCI, the package footprint can be reduced...
Wire bonding technology has been the mainstream for stacked die packages for over five years. Yet, based on current design rule, the package body size increases with respect to the number of dice stacked in the package. Furthermore, the electrical performance is greatly dependant to the wire length. By applying Vertical Circuit Interconnection technology, VCI, the package footprint can be reduced...
QFN and Dual row QFN (DR-QFN) are mature packages which the current industry can only provide IC assembly for body size less than 13×13mm, with less than 180 IO counts. At present, substrate with Ball Grid Array is often preferred as the market trend for more pin counts requisition. Yet, the cost of substrate is significantly higher than lead-frame. By applying the concept of trace routing in a conventional...
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