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This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide variety of surface- and thin-SOI microstructures that included microcavities, RF switches and various...
We aim to present the principle, design, fabrication and measurement results of a quasi digital accelerometer fabricated on thin silicon-on-insulator (SOI) substrate. The presented device features quasi-digital output, therefore eliminating the need for analogue signal conditioning. The accelerometer can be directly interfaced to digital electronic circuitry. The measurements showed a pull-in voltage...
This paper presents the fabrication process and results of the 3D silicon carbide surface micromachined accelerometer compatible with CMOS processing. PECVD silicon carbide as mechanical material and aluminium as electrodes were used. Due to thermal budget of maximum processing temperature of 400degC, the sensor is fabricated on top of the CMOS readout circuit as a post-processing module. The sensor...
This paper reports the first pull-in time accelerometer made by post-processing surface micromachining technology. As the pull-in time is a semi digital signal, the output of the device can be measured with a fully digital circuit. The sensitivity and nonlinearity are comparable with the differential capacitive sensing devices. Aluminium was used for the mechanical layer, while phosphosilicate glass...
In this paper an epi-micromachining technique is presented which combines the advantages of both surface and bulk micromachining. The process is based on the use of a buried sacrificial porous layer and offers high flexibility. Horizontal and vertical accelerometer structures have been fabricated using the epitaxial layer as construction material. Buried p+ silicon was used as sacrificial material...
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