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With global drivers such as better energy consumption, energy efficiency and reduction of greenhouse gases, CO2 emission reduction has become key in every layer of the value chain. Power Electronics has definitely a role to play in these thrilling challenges. From converters down to compound semiconductors, innovation is leading to breakthrough technologies. Wide BandGap, Power Module Packaging, growth...
3D integration is a promising and fast growing field that addresses the convergence of Moore's Law and more than Moore. 3D integration offers higher performance, higher density, higher functionality, smaller form factor, and potential cost reduction. With this emerging field, new and improved technologies will be necessary to meet the associated manufacturing challenges. This paper describes some...
3D technology will be the next step for the development of microelectronic devices. Vertical interconnection is one of the challenging issues. Cu/SiO2 patterned surface might be one of the possible techniques to address it. In this work, direct patterned Cu/SiO2 surfaces bonding at room temperature, atmospheric pressure and ambient air is demonstrated. High alignment and bonding quality is achieved...
This paper presents the latest results on electrical characterization of wafer to wafer structures made by direct copper bonding. The bonding was achieved at room temperature, atmospheric pressure and ambient air, followed by a 200°C or 400°C post bonding anneal. Description of the 3D integration process and the test-vehicle (which is used to evaluate the impact of bonding on Cu/Cu interface reliability)...
Localized metal bonding is one of the main drivers for 3D technology implementation as it allows high vertical interconnection densities between piled up dies. In this paper we will present the direct bonding of tungsten blanket. The copper and tungsten direct bonding will be compared in terms of bonding mechanism and temperature dependence.
Direct wafer bonding and thinning technologies are now extensively used in combination to produce SOI wafers (silicon-on-insulators) or innovative engineered substrates. Emerging demands of new functionalities at the material or device level for 3D integration have allowed increasing the level of maturity of these technologies. This paper will review the physics of wafer direct bonding and its implementation...
In 3D integration circuits, metal bonding is a key stage for stacking wafers. In this contribution, the direct Cu/Cu bonding at atmospheric pressure is investigated. At room temperature, a 2.8 J/m2 bonding toughness is achieved without copper oxide at the interface. The vertical current of this bonding and the possibility to grind the top silicon down to 10 ??m have been demonstrated.
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