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A fully hybrid computer-aided circuit design to achieve a first-pass on-board CMOS LNA fabrication is studied. The LNA is implemented in 0.13-μm CMOS process. A post-layout die-level electromagnetic-field analysis, to extract the interconnection and interaction parasitic between on-chip components, is used. The extracted touchstone model is integrated with circuit model of board including the microstrip...
This paper deals with the susceptibility of analog integrated circuits to radio frequency interferences (RFI) and it concentrates on the effects induced by RFI on the operation of offset compensated chopped CMOS operational amplifiers. The first part of the work explains the causes of the additional output DC offset induced by input RF disturbances in chopped systems. Afterwards, the design of a chopped...
Chopper stabilization is the most widely used circuit technique to reduce the influence of the flicker noise in an amplifier. Recently, observation of /ƒ2 input-referred noise in the chopper amplifier with a high-impedance input source was reported. However, the mechanism of this /ƒ2 phenomenon has not been completely analyzed. This paper provides the complete analysis of the noise influence generated...
A 40 GHz power amplifier (PA) driver for the remote antenna unit (RAU) transceiver of a mm-wave radio-over-fiber (RoF) system is presented in this paper. Mm-wave RAU is proposed as a complementary technology to fiber-to-the-home to minimize costs and to increase bandwidth. In order for RoF to be feasible, the cost of the RAU must be minimized through low-cost technology such as CMOS. The PA driver...
This paper presents an optimization of the rectifier module for Radio Frequency (RF) energy harvesting system at 915 MHz band. This module converts the RF signal into direct-current voltage at the given frequency band to power ultra-low power bio-medical sensor. A transient analysis on various types of rectifier circuit is carried out to investigate their efficiency and sensitivity. To improve the...
Off-chip antenna excitation through magnetic inductive coupling at 60GHz has been proposed to facilitate the industrial RFIC measurement or the antenna connection to the RFIC chip. To verify the concept, a slot antenna at top layer of the PCB was excited through magnetic coupling from the RFIC chip set at the proximity of the antenna. Minimum return loss of −17dB, gain of 6dBi, and bandwidth of 7GHz...
The MIPI RFFE slave interface circuit including Power-on-Reset (PoR), SCLK receiver and SDATA bidirectional transceiver has been implemented with a CMOS 250 nm process. Simulation results show that the designed circuit has SDATA output transition time (for rise and fall) of shorter than 3.3 ns at a full-speed rate of 26 MHz, which satisfies the timing requirement (< 6.5 ns) by the specification...
A low-voltage low-power CMOS ZigBee receiver front-end supporting 780/868/915/2400MHz bands is presented in this paper. The wideband common-gate (CG) low noise amplifier (LNA) and the I/Q current-commutating mixer are merged in a single circuit, sharing the bias current. Active trans-conductance (gm) boosting technique is utilized in the design of the presented receiver front-end. The topology and...
An envelope elimination and restoration (EER) transmitter that comprises a class-E power amplifier and a digitally controlled current DAC modulator is presented. A switched capacitor DAC is designed to control an open-loop transconductor that operates as a current modulator, modulating the amplitude of the current supplied to a class-E PA. Such a topology allows for increased filtering of the quantization...
This work proposes an inductorless wideband low noise amplifier (LNA) for multistandard applications. This LNA is based on a self-biased complementary current-reuse common source amplifier on the forward path and a source follower on the feedback, using a gyrator-C like effect to create real valued impedance and an inductive effect, achieving wideband input matching. Designed in IBM 130 nm CMOS process,...
In this paper a highly-linear software defined radio front-end (LNA and Mixer) for wireless sensor networks in the 5.8-to-13 GHz frequency range is presented. It is suitable to IEEE 802.15.4a and IEEE 802.15.4a and upcoming different standards. The RF front-end features a very high robustness to out-of-band interference (OBI) thanks to mixer-based RF blocker filtering. This allows to remove any dedicated...
This paper presents an RF DAC fabricated in a 65nm 1p7m CMOS process. The DAC is capable of >10Gsps operation dissipating ∼800mW. At 3Gsps the SFDR > 70dBc beyond 1GHz and the IM3 performance is < −80dBc within the same range. Signal processing is incorporated into the DAC providing interpolation and modulation through the full Nyquist band. Features and performance enable a wide application...
In this work, an effective linearization technique to linearize both AM-PM and AM-AM distortions in CMOS envelope tracking (ET) transmitter is developed using dual shaping tables. AM-AM response is linearized using iso-gain shaping table. A variable phase shifter is integrated with the RF power amplifier (RF PA), which linearizes AM-PM response of CMOS ET PA in conjunction with the iso-gain shaping...
As the technology is scaling downs day by day designing of radio frequency integrated circuit (RFIC's) is introduces more challenges in the world of electronics. The challenges are such as area gain, size, and leakage current, electrostatic discharge (ESD), power consumptions & so many, raises the threat while designing the electronic circuitry. Among all these challenges we are focusing on the...
A tracking load circuit for RF rectifiers is described. The tracking load is designed to maximize RF to DC conversion efficiency as the RF input power to the rectifier changes. The circuit consists of two DC to DC converters with two control loops. The duty cycle of the first stage converter is adjusted by an analog control loop to have an input impedance that is optimum for maximizing the power efficiency...
A wide band radio frequency (RF) root-mean-square (RMS) power detector (PD) is presented in this paper. A CMOS rectifier with unbalanced source-coupled pairs and auxiliary capacitors is utilized to constitute the reverse received signal strength indicator (reverse-RSSI) architecture as proposed power detector with operating frequency from 300 MHz to 10 GHz. The auxiliary capacitors are introduced...
RF-FPGAs and field-programmable filter arrays require tunable analog filters that can be digitally reconfigured in real-time to have several user-selected passbands and stopband notches. Such reconfigurable analog filters must operate in the microwave frequencies up to several GHz in order to meet the needs of emerging cognitive radio and reconfigurable radar front-ends. Tunable passive filters based...
This article presents the design and implementation of a multi-stage radio-frequency (RF) passive polyphase filter (PPF). The layout parasitics and mismatch which deteriorate significantly the RF filter performance are analyzed and modeled. To reduce this parasitic degradation, a novel optimal layout technique is proposed. It is based on reproducing the same optimized PPF stage layout for the different...
The electrostatic discharge (ESD) immunity test for EMC was one important reliability regulation. The turn-on-efficient on-chip ESD protection circuit is required to clamp the overstress voltage. A new design of ESD protection diodes with embedded silicon-controlled rectifier (SCR) was proposed to protect the gigahertz differential low-noise amplifier (LNA). Experimental results had shown that the...
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