The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Packaging of microelectromechanical systems (MEMS) strongly affects the device performances. It is the core technology for the advancement of MEMS and is recognized as the next manufacturers challenge for the forthcoming years due to the growing market and stricter requirements. There is a vast diversity of applications and the most of MEMS packaging challenges are application dependent. It is the...
Electrical characteristics of the advanced logic and memory devices, which incorporate nano-thin layers of dielectric materials in their gate dielectric stacks, are sensitive to even extremely small concentrations of electrically active defects. Conventional empirical reliability models, which heavily rely on statistical data sets, demonstrate limited capability to predict the parameters drift in...
POP stacking technique satisfied the demands of miniaturization, function integration and higher memory space for mobile communication products. However, the warpage of POP package during the soldering procedure will bring the unfavorable effects to quality and reliability of the products. The paper introduces the POP assembling procedure, aims to test and results analysis the effect of package warpage...
ULSI circuits are constantly improved by continuous scaling down the character sizes. Copper connections and the ultralow-k (ULK) materials as inter-layer dielectrics (ILD) and inter-metal dielectrics (IMD) were implemented. Therefore, the chip package interaction (CPI) becomes critical due to the mechanical properties deteriorate of ULK with high porosity. The reliability of ULK layer may be affected...
Electronic assembly technology is in the transition from traditional tin-lead to lead-free. In comparison with Sn-Pb solders, high melting point and poor wettability of the lead-free solders lead to great challenge in many aspects. It has been accepted that inert N2 atmosphere can improve the wettability and reliablity of solder joints. The focus of this study is to investigate the reliability of...
In this paper, the main failure modes and mechanisms were investigated through some failure analysis cases, based on this, Subsequent 160°C, 170°C and180°C lifetime tests were completed. According to the method of least squares, the degradation model of high power light emitting diodes is obtained. Using the model and ALTA9 software, the extrapolated lifetime of high power light emitting diode at...
The 3D finite element analysis models of 3D-TSV interconnect structure were developed. By using ANSYS the finite element analysis of the stress and strain distribution in the model was performed under random vibration load. Comparative analysis of the stress and strain of TSV interconnect structure between the micro-bump materials are copper and SAC387. And also comparative analysis the stress and...
A PHM (prognostics and health management) scheme for electronic product is proposed on the basis of physics-of-failure. This method can help online reliability evaluation under real environmental condition by the identification of potential failure mechanism and failure position for devices, products and systems, so as to establish the foundation of reliability assessment for new material, new structure...
As an indispensible part of electronic equipment, the reliability of the whole system is affected by the degradation performance of power MOSFET tube. Based on geometry, material properties and boundary conditions, the repeated testing can be reduced, and the period of failure analysis can be shortened. This article is based on the finite element model of power MOSFET TO-263, electric thermal — mechanical...
Die to die interconnection in wirebonding process these days is just common in particular to the mature packages using Gold (Au) wire as mean for interconnection. With the intense market competition to deliver a much competitive cost of the products more manufacturers, sub-contractors and even IDM (integrated device manufacturing) are now inclined with the use of Copper (Cu) wire as an alternative...
Silver-based low temperature sintering technology (LTST) is becoming a promising alternative to bond or joint the large area joints as die attach for high temperature power modules. A review of the silver-sintered die attach technologies will be presented in this paper, as well as a roadmap of challenge of the state-of-the-art silver sintering. Then, highlighted are the methodology of sintering process,...
Polymer based organic photovoltaic systems, which can be mass-produced by roll-to-roll printing technology, hold the promise for a cost-effective, lightweight and mechanical flexible solar energy conversion platform. Nevertheless, challenges still remain for large-scale applications of these flexible solar cells. One of the issues of great importance is the long-time reliability of solar cell module...
Lead-free solder alloys are more easily oxygenized and have poor wettability compared to traditional Sn-Pb solder alloys, which affects solder joints reliability. Ar is the most plentiful rare inert gas. It has been accepted that, in Ar atmosphere, the oxidation of lead-free solder joints can be prevented and the wettability of lead-free solder joints can be improved. To date, however, few systemic...
This paper investigates the effect of demagnetization of the permanent magnets (PM) on the performance of interior permanent magnet motors. In order to remove the individual difference of the motors, several shapes of PMs are prepared, and the experiments are carried out with the same stator. This paper takes into account two types control strategy, V/f constant control and vector control. It is clarified...
In this work we will illustrate the criteria useful to identify simple and quick operations through which “the why and the when” a scheduled maintenance can be performed in order to avoid excessive checks and controls, often difficult and expensive to run. The question that in fact arises in the preparation of preventive maintenance program is if it is possible to satisfy the reliability requirements...
The wafer level ball grid array (WLBGA), a silicon die-size package, offers the small form factor and highperformance packaging solution. Good board-level reliability under drop impact is achieved on account if its light weight. There is, however, a limitation on the reliability of the solder joint at board level, subject to thermal cyclic loading. This places a limit on the silicon die-size window...
Traditionally fan out wafer level package technology has been associated with lower power, smaller body sizes (typically < 8mm×8mm), small body-to-die size area ratios (<2) and fine pitch BGAs (0.4mm or less). This work extends this technology to larger body sizes up to 13mm × 13mm, higher powers, > 5W, and larger body-to-die size area ratios up to 10.5. It is shown that such packages can...
Presence of a thermal enabling load applied to Ball Grid Array (BGA) components creates a distinctive set of evaluations to be completed for reliability of solder joints (SJ) that connect the BGA to the board. This becomes especially relevant for newer technologies that drive to smaller component form factors. In this comprehensive study, a computational mechanics based Design of Experiments approach...
This paper discusses a thermal reliability testing experiment and failure analysis (FA) in 32nm SOI Si technology chip packages. Thermal performance of the TIM materials is monitored and physical failure analysis is performed on test vehicle packages post thermal reliability test. Thermomechanical modeling is conducted for different test conditions. TIM thermal degradation is observed at the chip...
This paper presents the design and modeling of the MEMS mechanical fatigue in the presence of stress raising notches. FEM models are realized to study the effect of notch geometric parameters on the stress concentration factor of the gold specimen subjected to tensile loading. Test structures with three different specimens, i.e. without notch, with single notch and with a double notch are modeled...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.