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Based on physically-extended methodology, measurements and simulations show that implementing high-mobility materials and particularly alloys, such as a SiGe buffer for mobility enhancement in a Ge channel, can result in a 115% increase in self heating in the N7 node, compared to standard Si FinFETs.
This paper focuses on the design and experiments of Ge/SiGe QW waveguide modulators integrated on Ge-rich GeSi waveguide. This new photonic integration approach allows high bandwidth Ge-based active optical circuitry to be realized on bulk Si wafer at low temperature.
A graded buffer layer is needed in order to grow III–V/SiGe on silicon substrate because of the lattice mismatch. In this work, optical absorption in the graded buffer layer is quantified by measuring the transmittances. We demonstrate a 7 µm graded buffer layer with Ge composition from 0% to 82% is equivalent to a 2 µm SiGe film with 82% Ge composition in terms of optical absorption. A SiGe solar...
Light trapping capability is analyzed for the SiGe solar cell in the GaAsP-SiGe tandem device. One-dimensional model predicts an achievable Jsc of 17.46 mA/cm2 below the top cell, with the electrical parameter from quantum efficiency fitting. Experimentally, a Jsc of 15.59 mA/cm2 was achieved from the Si.18Ge.82 cell, with textured SiO2 back surface reflector and a single layer SiNx anti-reflection...
Contact schemes for scaled Si, SiGe and Ge channel MOSFETs devices are discussed, consistent with an approach based on SiGe alloys with low Schottky Barrier Height (SBH) for pMOS and Si contacts for nMOS, making reduction of the SBH to nSi critical. Methods for SBH reduction, and their underlying mechanisms, are studied. Accurate cryogenic CV measurements were used to extract SBH. We show that chalcogenide...
The present analysis for base transit time of a modern high-speed npn bipolar transistor is done for Gaussian-doped base considering doping dependence of mobility, bandgap narrowing effect and carrier velocity saturation effect at base-collector junction using analytical process. This paper analyzes the base transit time of a Silicon-Germanium Heterojunction Bipolar Transistor (SiGe HBT) considering...
This paper reviews the technology requirements of future mm-wave systems-on-chip and the challenges facing mm-wave MOSFET and SiGe HBT device and benchmark circuit scaling towards 3nm gate length and beyond 1.5THz fMAX. Measurements of state-of-the-art MOSFETs, HBTs and cascodes are presented from DC to 325 GHz. Finally, simulations of the scaling of the SiGe HBT mm-wave benchmark circuit performance...
An effective wet clean method to remove unwanted growth SiGe defect in FinFET Junction sector was demonstrated in a single wafer clean toolset. The unwanted growth SiGe defect was known due to the tiny metallic particles (<10nm) from chemical sources in pre SiGe growth clean step. The new wet clean method can remove tiny metallic particles efficiently and obtain better surface particles performance...
A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared to SOI or FinFET based designs. Alternatively, the highly doped p-channel bulk planar ZRAM with electrostatic potential well- based hole-storage is susceptible to random- dopant-fluctuation (RDF) induced VT variability. Here, we propose and evaluate a planar bulk ZRAM device with an intrinsic channel of...
SiGe channel planar pMOSFETs have been recently shown to offer improved NBTI reliability, owing to reduced hole trapping into pre-existing oxide defects and reduced interface state generation. In this paper we report a broad set of experimental data of SiGe cladding finFETs with varying fin widths, and we show that the intrinsically superior NBTI reliability can be ported to 3D architectures of relevance...
In this paper the evolution of silicon based automotive radar for the 76-81 GHz range is described. Starting with SiGe bare-die chips in 2009, today packaged MMICs are available for low-cost radar applications. Future SiGe BiCMOS technology will enable highly integrated single chip radars with superior performance at lower power consumption. This will pave the way for automotive radar safety for everyone...
SiGe epilayer is extensively used as stressor in source/drain regions in PMOS. However, it is a big challenge to form germanosilicide with low contact resistivity due to poor thermal stability at high temperature. Therefore, silicon cap deposited on SiGe is applied to reduce contact resistance. In static random access memory (SRAM) area, silicon cap profile is apt to be un-conformal due to SiGe pattern...
To meet CD specifications required for 10nm and beyond Fully-depleted SOI devices (FDSOI) techniques alternative to EUV lithography are being developed. This article reports on the demonstration of Self-Aligned Dual Patterning (SADP), multi-beam electronic lithography and Directed Self-Assembly (DSA) to fabricate silicon fins with width < 10nm and high-k / metal gates with 11nm CD, or to shrink...
To obtain a defect free and dislocation free during SiGe deposition is the key for improving hole carrier mobility for 40 nm technology node and beyond. This paper presents a methodology to eliminate SiGe dislocation. The key step is to introduce SF6 during Si trench surface treatment after Si trench main etch.
The modern SiGe HBT structure with shallow and deep trench isolation (STI and DTI) is analyzed from electrothermal standpoint using TCAD system. The electrical parameters β, fT, fmax, maximal temperature Tmax, and thermal resistance RTH are under consideration. TCAD simulation confirms the fact that the presence of STI and DTI in SiGe HBT structures gains the self-heating effect in comparison with...
Non-ionizing terahertz imaging using solid-state integrated electronics has been gaining increasing attention over the past few years. However, there are currently several factors that deter the implementations of fully-integrated imaging systems. Due to the lack of low-noise amplification above fmax, the sensitivity of THz pixels on silicon cannot match that of its mm-Wave or light-wave counterparts...
We demonstrate enhanced photoluminescence from Ge/SiGe quantum wells with strain from −0.28% (compressive) to 0.25% (tensile) achieved by epitaxial growth techniques. The intensity enhancement and peak shift from photoluminescence measurements are in agreement with theoretical calculations.
Silicon-Germanium is used as an alternative channel material for pFET in high-k metal gate-first technologies for 32 nm and beyond. However, gate-induced drain leakage (GIDL) is significant at nominal bias due to band-to-band tunneling (BTBT) at the gate-to-drain overlap surface and gate sidewall junctions. In this work, the results of numerical simulation are compared with experimental results for...
SiGe thin layers were deposited using LPCVD at different temperatures and pressures. The effect of the growth characteristics on the composition, grain growth and crystallinity were studied with the aim of maximizing the tensile stress of the films deposited. As expected, at constant reactant gas ratios, temperature had the maximum effect, with stress changing from compressive to tensile at higher...
SiGe HBT is a key device for BiCMOS process used for high-speed communication, automotive radar and defense military. For normal SiGe process, the control of emitter window undercut is often not easy. In this paper, we studied the influence of emitter undercut on HBT parameters, through both TCAD simulation and wafer results. While transistors with larger area-to-perimeter ratio are supposed to have...
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